Files
clang-p2996/llvm/test/CodeGen/X86/pr2585.ll
Francis Visoiu Mistrih 25528d6de7 [CodeGen] Unify MBB reference format in both MIR and debug output
As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.

The MIR printer prints the IR name of a MBB only for block definitions.

* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix

Differential Revision: https://reviews.llvm.org/D40422

llvm-svn: 319665
2017-12-04 17:18:51 +00:00

33 lines
1.5 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
@0 = external constant <4 x i32> ; <<4 x i32>*>:0 [#uses=1]
@1 = external constant <4 x i16> ; <<4 x i16>*>:1 [#uses=1]
define internal void @PR2585() {
; X32-LABEL: PR2585:
; X32: # %bb.0:
; X32-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
; X32-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; X32-NEXT: movq %xmm0, __unnamed_2
; X32-NEXT: retl
;
; X64-LABEL: PR2585:
; X64: # %bb.0:
; X64-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; X64-NEXT: movq %xmm0, {{.*}}(%rip)
; X64-NEXT: retq
load <4 x i32>, <4 x i32>* @0, align 16 ; <<4 x i32>>:1 [#uses=1]
bitcast <4 x i32> %1 to <8 x i16> ; <<8 x i16>>:2 [#uses=1]
shufflevector <8 x i16> %2, <8 x i16> undef, <8 x i32> < i32 0, i32 2, i32 4, i32 6, i32 undef, i32 undef, i32 undef, i32 undef > ; <<8 x i16>>:3 [#uses=1]
bitcast <8 x i16> %3 to <2 x i64> ; <<2 x i64>>:4 [#uses=1]
extractelement <2 x i64> %4, i32 0 ; <i64>:5 [#uses=1]
bitcast i64 %5 to <4 x i16> ; <<4 x i16>>:6 [#uses=1]
store <4 x i16> %6, <4 x i16>* @1, align 8
ret void
}