e2bfcd6394
This patch aims to provide correct dwarf unwind information in function epilogue for X86. It consists of two parts. The first part inserts CFI instructions that set appropriate cfa offset and cfa register in emitEpilogue() in X86FrameLowering. This part is X86 specific. The second part is platform independent and ensures that: * CFI instructions do not affect code generation (they are not counted as instructions when tail duplicating or tail merging) * Unwind information remains correct when a function is modified by different passes. This is done in a late pass by analyzing information about cfa offset and cfa register in BBs and inserting additional CFI directives where necessary. Added CFIInstrInserter pass: * analyzes each basic block to determine cfa offset and register are valid at its entry and exit * verifies that outgoing cfa offset and register of predecessor blocks match incoming values of their successors * inserts additional CFI directives at basic block beginning to correct the rule for calculating CFA Having CFI instructions in function epilogue can cause incorrect CFA calculation rule for some basic blocks. This can happen if, due to basic block reordering, or the existence of multiple epilogue blocks, some of the blocks have wrong cfa offset and register values set by the epilogue block above them. CFIInstrInserter is currently run only on X86, but can be used by any target that implements support for adding CFI instructions in epilogue. Patch by Violeta Vukobrat. Differential Revision: https://reviews.llvm.org/D42848 llvm-svn: 330706
347 lines
10 KiB
LLVM
347 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=knl | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefix=X64
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define <16 x i32> @select00(i32 %a, <16 x i32> %b) nounwind {
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; X86-LABEL: select00:
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; X86: # %bb.0:
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; X86-NEXT: cmpl $255, {{[0-9]+}}(%esp)
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; X86-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; X86-NEXT: je .LBB0_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: vmovdqa64 %zmm0, %zmm1
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; X86-NEXT: .LBB0_2:
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; X86-NEXT: vpxorq %zmm1, %zmm0, %zmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: select00:
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; X64: # %bb.0:
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; X64-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; X64-NEXT: cmpl $255, %edi
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; X64-NEXT: je .LBB0_2
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; X64-NEXT: # %bb.1:
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; X64-NEXT: vmovdqa64 %zmm0, %zmm1
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; X64-NEXT: .LBB0_2:
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; X64-NEXT: vpxorq %zmm1, %zmm0, %zmm0
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; X64-NEXT: retq
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%cmpres = icmp eq i32 %a, 255
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%selres = select i1 %cmpres, <16 x i32> zeroinitializer, <16 x i32> %b
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%res = xor <16 x i32> %b, %selres
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ret <16 x i32> %res
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}
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define <8 x i64> @select01(i32 %a, <8 x i64> %b) nounwind {
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; X86-LABEL: select01:
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; X86: # %bb.0:
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; X86-NEXT: cmpl $255, {{[0-9]+}}(%esp)
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; X86-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; X86-NEXT: je .LBB1_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: vmovdqa64 %zmm0, %zmm1
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; X86-NEXT: .LBB1_2:
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; X86-NEXT: vpxorq %zmm1, %zmm0, %zmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: select01:
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; X64: # %bb.0:
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; X64-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; X64-NEXT: cmpl $255, %edi
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; X64-NEXT: je .LBB1_2
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; X64-NEXT: # %bb.1:
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; X64-NEXT: vmovdqa64 %zmm0, %zmm1
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; X64-NEXT: .LBB1_2:
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; X64-NEXT: vpxorq %zmm1, %zmm0, %zmm0
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; X64-NEXT: retq
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%cmpres = icmp eq i32 %a, 255
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%selres = select i1 %cmpres, <8 x i64> zeroinitializer, <8 x i64> %b
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%res = xor <8 x i64> %b, %selres
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ret <8 x i64> %res
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}
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define float @select02(float %a, float %b, float %c, float %eps) {
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; X86-LABEL: select02:
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; X86: # %bb.0:
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; X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; X86-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
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; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: cmovael %eax, %ecx
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; X86-NEXT: flds (%ecx)
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; X86-NEXT: retl
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;
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; X64-LABEL: select02:
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; X64: # %bb.0:
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; X64-NEXT: vcmpless %xmm0, %xmm3, %k1
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; X64-NEXT: vmovss %xmm2, %xmm0, %xmm1 {%k1}
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; X64-NEXT: vmovaps %xmm1, %xmm0
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; X64-NEXT: retq
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%cmp = fcmp oge float %a, %eps
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%cond = select i1 %cmp, float %c, float %b
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ret float %cond
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}
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define double @select03(double %a, double %b, double %c, double %eps) {
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; X86-LABEL: select03:
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; X86: # %bb.0:
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; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; X86-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
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; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: cmovael %eax, %ecx
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; X86-NEXT: fldl (%ecx)
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; X86-NEXT: retl
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;
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; X64-LABEL: select03:
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; X64: # %bb.0:
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; X64-NEXT: vcmplesd %xmm0, %xmm3, %k1
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; X64-NEXT: vmovsd %xmm2, %xmm0, %xmm1 {%k1}
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; X64-NEXT: vmovapd %xmm1, %xmm0
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; X64-NEXT: retq
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%cmp = fcmp oge double %a, %eps
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%cond = select i1 %cmp, double %c, double %b
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ret double %cond
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}
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define <16 x double> @select04(<16 x double> %a, <16 x double> %b) {
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; X86-LABEL: select04:
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; X86: # %bb.0:
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; X86-NEXT: pushl %ebp
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: .cfi_offset %ebp, -8
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; X86-NEXT: movl %esp, %ebp
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; X86-NEXT: .cfi_def_cfa_register %ebp
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; X86-NEXT: andl $-64, %esp
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; X86-NEXT: subl $64, %esp
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; X86-NEXT: vmovaps 8(%ebp), %zmm1
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; X86-NEXT: movl %ebp, %esp
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; X86-NEXT: popl %ebp
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; X86-NEXT: .cfi_def_cfa %esp, 4
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; X86-NEXT: retl
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;
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; X64-LABEL: select04:
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; X64: # %bb.0:
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; X64-NEXT: vmovaps %zmm3, %zmm1
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; X64-NEXT: retq
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%sel = select <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <16 x double> %a, <16 x double> %b
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ret <16 x double> %sel
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}
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define i8 @select05(i8 %a.0, i8 %m) {
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; X86-LABEL: select05:
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; X86: # %bb.0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %al
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; X86-NEXT: orb {{[0-9]+}}(%esp), %al
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; X86-NEXT: retl
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;
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; X64-LABEL: select05:
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; X64: # %bb.0:
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; X64-NEXT: orl %esi, %edi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%mask = bitcast i8 %m to <8 x i1>
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%a = bitcast i8 %a.0 to <8 x i1>
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%r = select <8 x i1> %mask, <8 x i1> <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>, <8 x i1> %a
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%res = bitcast <8 x i1> %r to i8
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ret i8 %res;
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}
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define i8 @select05_mem(<8 x i1>* %a.0, <8 x i1>* %m) {
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; X86-LABEL: select05_mem:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movzbl (%ecx), %ecx
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; X86-NEXT: kmovw %ecx, %k0
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; X86-NEXT: movzbl (%eax), %eax
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; X86-NEXT: kmovw %eax, %k1
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; X86-NEXT: korw %k1, %k0, %k0
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; X86-NEXT: kmovw %k0, %eax
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; X86-NEXT: # kill: def $al killed $al killed $eax
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; X86-NEXT: retl
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;
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; X64-LABEL: select05_mem:
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; X64: # %bb.0:
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; X64-NEXT: movzbl (%rsi), %eax
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; X64-NEXT: kmovw %eax, %k0
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; X64-NEXT: movzbl (%rdi), %eax
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; X64-NEXT: kmovw %eax, %k1
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; X64-NEXT: korw %k1, %k0, %k0
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; X64-NEXT: kmovw %k0, %eax
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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%mask = load <8 x i1> , <8 x i1>* %m
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%a = load <8 x i1> , <8 x i1>* %a.0
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%r = select <8 x i1> %mask, <8 x i1> <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>, <8 x i1> %a
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%res = bitcast <8 x i1> %r to i8
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ret i8 %res;
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}
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define i8 @select06(i8 %a.0, i8 %m) {
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; X86-LABEL: select06:
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; X86: # %bb.0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %al
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; X86-NEXT: andb {{[0-9]+}}(%esp), %al
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; X86-NEXT: retl
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;
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; X64-LABEL: select06:
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; X64: # %bb.0:
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; X64-NEXT: andl %esi, %edi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%mask = bitcast i8 %m to <8 x i1>
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%a = bitcast i8 %a.0 to <8 x i1>
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%r = select <8 x i1> %mask, <8 x i1> %a, <8 x i1> zeroinitializer
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%res = bitcast <8 x i1> %r to i8
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ret i8 %res;
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}
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define i8 @select06_mem(<8 x i1>* %a.0, <8 x i1>* %m) {
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; X86-LABEL: select06_mem:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movzbl (%ecx), %ecx
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; X86-NEXT: kmovw %ecx, %k0
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; X86-NEXT: movzbl (%eax), %eax
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; X86-NEXT: kmovw %eax, %k1
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; X86-NEXT: kandw %k1, %k0, %k0
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; X86-NEXT: kmovw %k0, %eax
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; X86-NEXT: # kill: def $al killed $al killed $eax
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; X86-NEXT: retl
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;
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; X64-LABEL: select06_mem:
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; X64: # %bb.0:
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; X64-NEXT: movzbl (%rsi), %eax
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; X64-NEXT: kmovw %eax, %k0
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; X64-NEXT: movzbl (%rdi), %eax
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; X64-NEXT: kmovw %eax, %k1
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; X64-NEXT: kandw %k1, %k0, %k0
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; X64-NEXT: kmovw %k0, %eax
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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%mask = load <8 x i1> , <8 x i1>* %m
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%a = load <8 x i1> , <8 x i1>* %a.0
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%r = select <8 x i1> %mask, <8 x i1> %a, <8 x i1> zeroinitializer
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%res = bitcast <8 x i1> %r to i8
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ret i8 %res;
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}
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define i8 @select07(i8 %a.0, i8 %b.0, i8 %m) {
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; X86-LABEL: select07:
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; X86: # %bb.0:
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: kmovw %eax, %k0
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: kmovw %eax, %k1
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: kmovw %eax, %k2
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; X86-NEXT: kandnw %k2, %k0, %k2
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; X86-NEXT: kandw %k0, %k1, %k0
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; X86-NEXT: korw %k2, %k0, %k0
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; X86-NEXT: kmovw %k0, %eax
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; X86-NEXT: # kill: def $al killed $al killed $eax
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; X86-NEXT: retl
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;
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; X64-LABEL: select07:
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; X64: # %bb.0:
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; X64-NEXT: kmovw %edx, %k0
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; X64-NEXT: kmovw %edi, %k1
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; X64-NEXT: kmovw %esi, %k2
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; X64-NEXT: kandnw %k2, %k0, %k2
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; X64-NEXT: kandw %k0, %k1, %k0
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; X64-NEXT: korw %k2, %k0, %k0
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; X64-NEXT: kmovw %k0, %eax
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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%mask = bitcast i8 %m to <8 x i1>
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%a = bitcast i8 %a.0 to <8 x i1>
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%b = bitcast i8 %b.0 to <8 x i1>
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%r = select <8 x i1> %mask, <8 x i1> %a, <8 x i1> %b
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%res = bitcast <8 x i1> %r to i8
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ret i8 %res;
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}
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define i64 @pr30249() {
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; X86-LABEL: pr30249:
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; X86: # %bb.0:
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; X86-NEXT: movl $2, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: pr30249:
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; X64: # %bb.0:
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; X64-NEXT: movl $2, %eax
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; X64-NEXT: retq
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%v = select i1 undef , i64 1, i64 2
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ret i64 %v
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}
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define double @pr30561_f64(double %b, double %a, i1 %c) {
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; X86-LABEL: pr30561_f64:
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; X86: # %bb.0:
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; X86-NEXT: testb $1, {{[0-9]+}}(%esp)
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; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: cmovnel %eax, %ecx
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; X86-NEXT: fldl (%ecx)
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; X86-NEXT: retl
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;
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; X64-LABEL: pr30561_f64:
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; X64: # %bb.0:
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; X64-NEXT: kmovw %edi, %k1
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; X64-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1}
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; X64-NEXT: retq
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%cond = select i1 %c, double %a, double %b
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ret double %cond
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}
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define float @pr30561_f32(float %b, float %a, i1 %c) {
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; X86-LABEL: pr30561_f32:
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; X86: # %bb.0:
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; X86-NEXT: testb $1, {{[0-9]+}}(%esp)
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; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: cmovnel %eax, %ecx
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; X86-NEXT: flds (%ecx)
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; X86-NEXT: retl
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;
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; X64-LABEL: pr30561_f32:
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; X64: # %bb.0:
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; X64-NEXT: kmovw %edi, %k1
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; X64-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
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; X64-NEXT: retq
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%cond = select i1 %c, float %a, float %b
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ret float %cond
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}
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define <16 x i16> @pr31515(<16 x i1> %a, <16 x i1> %b, <16 x i16> %c) nounwind {
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; X86-LABEL: pr31515:
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; X86: # %bb.0:
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; X86-NEXT: vpmovsxbd %xmm1, %zmm1
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; X86-NEXT: vpslld $31, %zmm1, %zmm1
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; X86-NEXT: vpmovsxbd %xmm0, %zmm0
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; X86-NEXT: vpslld $31, %zmm0, %zmm0
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; X86-NEXT: vptestmd %zmm0, %zmm0, %k1
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; X86-NEXT: vptestmd %zmm1, %zmm1, %k1 {%k1}
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; X86-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
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; X86-NEXT: vpmovdw %zmm0, %ymm0
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; X86-NEXT: vpandn %ymm2, %ymm0, %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: pr31515:
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; X64: # %bb.0:
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; X64-NEXT: vpmovsxbd %xmm1, %zmm1
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; X64-NEXT: vpslld $31, %zmm1, %zmm1
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; X64-NEXT: vpmovsxbd %xmm0, %zmm0
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; X64-NEXT: vpslld $31, %zmm0, %zmm0
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; X64-NEXT: vptestmd %zmm0, %zmm0, %k1
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; X64-NEXT: vptestmd %zmm1, %zmm1, %k1 {%k1}
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; X64-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
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; X64-NEXT: vpmovdw %zmm0, %ymm0
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; X64-NEXT: vpandn %ymm2, %ymm0, %ymm0
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; X64-NEXT: retq
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%mask = and <16 x i1> %a, %b
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%res = select <16 x i1> %mask, <16 x i16> zeroinitializer, <16 x i16> %c
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ret <16 x i16> %res
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}
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