d7391eefdf
At one point in time acquire implied mayLoad and mayStore as did release. Thus we needed separate pseudos that also carried that property. This appears to no longer be the case. I believe it was changed in 2012 with a comment saying that atomic memory accesses are marked volatile which preserves the ordering. So from what I can tell we shouldn't need additional pseudos since they aren't carry any flags that are different from the normal instructions. The only thing I can think of is that we may consider them for load folding candidates in the peephole pass now where we didn't before. If that's important hopefully there's something in the memory operand we can check to prevent the folding without relying on pseudo instructions. Differential Revision: https://reviews.llvm.org/D50212 llvm-svn: 338925
155 lines
4.6 KiB
LLVM
155 lines
4.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck %s
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; Note: This test is testing that the lowering for atomics matches what we
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; currently emit for non-atomics + the atomic restriction. The presence of
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; particular lowering detail in these tests should not be read as requiring
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; that detail for correctness unless it's related to the atomicity itself.
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; (Specifically, there were reviewer questions about the lowering for halfs
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; and their calling convention which remain unresolved.)
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define void @store_half(half* %fptr, half %v) {
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; CHECK-LABEL: store_half:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rdi, %rbx
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; CHECK-NEXT: callq __gnu_f2h_ieee
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; CHECK-NEXT: movw %ax, (%rbx)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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store atomic half %v, half* %fptr unordered, align 2
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ret void
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}
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define void @store_float(float* %fptr, float %v) {
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; CHECK-LABEL: store_float:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movd %xmm0, %eax
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; CHECK-NEXT: movl %eax, (%rdi)
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; CHECK-NEXT: retq
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store atomic float %v, float* %fptr unordered, align 4
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ret void
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}
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define void @store_double(double* %fptr, double %v) {
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; CHECK-LABEL: store_double:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %xmm0, %rax
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; CHECK-NEXT: movq %rax, (%rdi)
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; CHECK-NEXT: retq
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store atomic double %v, double* %fptr unordered, align 8
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ret void
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}
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define void @store_fp128(fp128* %fptr, fp128 %v) {
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; CHECK-LABEL: store_fp128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: callq __sync_lock_test_and_set_16
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; CHECK-NEXT: popq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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store atomic fp128 %v, fp128* %fptr unordered, align 16
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ret void
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}
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define half @load_half(half* %fptr) {
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; CHECK-LABEL: load_half:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: movzwl (%rdi), %eax
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; CHECK-NEXT: movzwl %ax, %edi
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; CHECK-NEXT: callq __gnu_h2f_ieee
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; CHECK-NEXT: popq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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%v = load atomic half, half* %fptr unordered, align 2
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ret half %v
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}
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define float @load_float(float* %fptr) {
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; CHECK-LABEL: load_float:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl (%rdi), %eax
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; CHECK-NEXT: movd %eax, %xmm0
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; CHECK-NEXT: retq
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%v = load atomic float, float* %fptr unordered, align 4
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ret float %v
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}
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define double @load_double(double* %fptr) {
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; CHECK-LABEL: load_double:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: movq %rax, %xmm0
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; CHECK-NEXT: retq
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%v = load atomic double, double* %fptr unordered, align 8
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ret double %v
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}
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define fp128 @load_fp128(fp128* %fptr) {
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; CHECK-LABEL: load_fp128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: xorl %esi, %esi
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: xorl %r8d, %r8d
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; CHECK-NEXT: callq __sync_val_compare_and_swap_16
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; CHECK-NEXT: popq %rcx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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%v = load atomic fp128, fp128* %fptr unordered, align 16
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ret fp128 %v
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}
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; sanity check the seq_cst lowering since that's the
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; interesting one from an ordering perspective on x86.
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define void @store_float_seq_cst(float* %fptr, float %v) {
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; CHECK-LABEL: store_float_seq_cst:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movd %xmm0, %eax
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; CHECK-NEXT: xchgl %eax, (%rdi)
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; CHECK-NEXT: retq
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store atomic float %v, float* %fptr seq_cst, align 4
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ret void
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}
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define void @store_double_seq_cst(double* %fptr, double %v) {
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; CHECK-LABEL: store_double_seq_cst:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %xmm0, %rax
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; CHECK-NEXT: xchgq %rax, (%rdi)
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; CHECK-NEXT: retq
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store atomic double %v, double* %fptr seq_cst, align 8
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ret void
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}
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define float @load_float_seq_cst(float* %fptr) {
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; CHECK-LABEL: load_float_seq_cst:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl (%rdi), %eax
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; CHECK-NEXT: movd %eax, %xmm0
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; CHECK-NEXT: retq
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%v = load atomic float, float* %fptr seq_cst, align 4
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ret float %v
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}
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define double @load_double_seq_cst(double* %fptr) {
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; CHECK-LABEL: load_double_seq_cst:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: movq %rax, %xmm0
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; CHECK-NEXT: retq
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%v = load atomic double, double* %fptr seq_cst, align 8
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ret double %v
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}
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