25528d6de7
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
110 lines
2.9 KiB
LLVM
110 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
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; SHLD/SHRD manual shifts
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define i64 @test1(i64 %hi, i64 %lo, i64 %bits) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andl $63, %edx
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: shldq %cl, %rsi, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%and = and i64 %bits, 63
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%and64 = sub i64 64, %and
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%sh_lo = lshr i64 %lo, %and64
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%sh_hi = shl i64 %hi, %and
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%sh = or i64 %sh_lo, %sh_hi
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ret i64 %sh
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}
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define i64 @test2(i64 %hi, i64 %lo, i64 %bits) nounwind {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andl $63, %edx
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: shrdq %cl, %rdi, %rsi
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; CHECK-NEXT: movq %rsi, %rax
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; CHECK-NEXT: retq
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%and = and i64 %bits, 63
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%and64 = sub i64 64, %and
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%sh_lo = shl i64 %hi, %and64
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%sh_hi = lshr i64 %lo, %and
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%sh = or i64 %sh_lo, %sh_hi
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ret i64 %sh
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}
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define i64 @test3(i64 %hi, i64 %lo, i64 %bits) nounwind {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: shldq %cl, %rsi, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%bits64 = sub i64 64, %bits
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%sh_lo = lshr i64 %lo, %bits64
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%sh_hi = shl i64 %hi, %bits
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%sh = or i64 %sh_lo, %sh_hi
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ret i64 %sh
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}
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define i64 @test4(i64 %hi, i64 %lo, i64 %bits) nounwind {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: shrdq %cl, %rdi, %rsi
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; CHECK-NEXT: movq %rsi, %rax
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; CHECK-NEXT: retq
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%bits64 = sub i64 64, %bits
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%sh_lo = shl i64 %hi, %bits64
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%sh_hi = lshr i64 %lo, %bits
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%sh = or i64 %sh_lo, %sh_hi
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ret i64 %sh
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}
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define i64 @test5(i64 %hi, i64 %lo, i64 %bits) nounwind {
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; CHECK-LABEL: test5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: shldq %cl, %rsi, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%bits64 = xor i64 %bits, 63
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%lo2 = lshr i64 %lo, 1
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%sh_lo = lshr i64 %lo2, %bits64
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%sh_hi = shl i64 %hi, %bits
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%sh = or i64 %sh_lo, %sh_hi
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ret i64 %sh
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}
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define i64 @test6(i64 %hi, i64 %lo, i64 %bits) nounwind {
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; CHECK-LABEL: test6:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: shrdq %cl, %rsi, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%bits64 = xor i64 %bits, 63
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%lo2 = shl i64 %lo, 1
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%sh_lo = shl i64 %lo2, %bits64
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%sh_hi = lshr i64 %hi, %bits
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%sh = or i64 %sh_lo, %sh_hi
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ret i64 %sh
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}
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define i64 @test7(i64 %hi, i64 %lo, i64 %bits) nounwind {
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; CHECK-LABEL: test7:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: shrdq %cl, %rsi, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%bits64 = xor i64 %bits, 63
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%lo2 = add i64 %lo, %lo
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%sh_lo = shl i64 %lo2, %bits64
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%sh_hi = lshr i64 %hi, %bits
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%sh = or i64 %sh_lo, %sh_hi
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ret i64 %sh
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}
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