2262613532
There's no advantage to this instruction unless you need to avoid touching other flag bits. It's encoding is longer, it can't fold an immediate, it doesn't write all the flags. I don't think gcc will generate this instruction either. Fixes PR38852. Differential Revision: https://reviews.llvm.org/D51754 llvm-svn: 342059
95 lines
3.0 KiB
LLVM
95 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=X64
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; Check for assert in foldMaskAndShiftToScale due to out of range mask scaling.
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@b = common global i8 zeroinitializer, align 1
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@c = common global i8 zeroinitializer, align 1
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@d = common global i64 zeroinitializer, align 8
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@e = common global i64 zeroinitializer, align 8
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define void @foo() {
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; X86-LABEL: foo:
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; X86: # %bb.0:
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; X86-NEXT: pushl %eax
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: movl d, %eax
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; X86-NEXT: notl %eax
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; X86-NEXT: movl d+4, %ecx
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; X86-NEXT: notl %ecx
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; X86-NEXT: andl $701685459, %ecx # imm = 0x29D2DED3
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; X86-NEXT: andl $-564453154, %eax # imm = 0xDE5B20DE
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; X86-NEXT: shrdl $21, %ecx, %eax
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; X86-NEXT: shrl $21, %ecx
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; X86-NEXT: andl $-2, %eax
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; X86-NEXT: addl $7, %eax
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; X86-NEXT: adcl $0, %ecx
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; X86-NEXT: pushl %ecx
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; X86-NEXT: .cfi_adjust_cfa_offset 4
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; X86-NEXT: pushl %eax
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; X86-NEXT: .cfi_adjust_cfa_offset 4
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; X86-NEXT: pushl $0
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; X86-NEXT: .cfi_adjust_cfa_offset 4
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; X86-NEXT: pushl $0
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; X86-NEXT: .cfi_adjust_cfa_offset 4
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; X86-NEXT: calll __divdi3
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; X86-NEXT: addl $16, %esp
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; X86-NEXT: .cfi_adjust_cfa_offset -16
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; X86-NEXT: orl %eax, %edx
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; X86-NEXT: setne {{[0-9]+}}(%esp)
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; X86-NEXT: popl %eax
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; X86-NEXT: .cfi_def_cfa_offset 4
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; X86-NEXT: retl
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;
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; X64-LABEL: foo:
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; X64: # %bb.0:
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; X64-NEXT: movq {{.*}}(%rip), %rax
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; X64-NEXT: movabsq $3013716102212485120, %rcx # imm = 0x29D2DED3DE400000
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; X64-NEXT: andnq %rcx, %rax, %rcx
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; X64-NEXT: shrq $21, %rcx
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; X64-NEXT: addq $7, %rcx
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; X64-NEXT: movabsq $4393751543808, %rax # imm = 0x3FF00000000
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; X64-NEXT: testq %rax, %rcx
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; X64-NEXT: je .LBB0_1
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; X64-NEXT: # %bb.2:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: divq %rcx
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; X64-NEXT: jmp .LBB0_3
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; X64-NEXT: .LBB0_1:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: divl %ecx
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; X64-NEXT: # kill: def $eax killed $eax def $rax
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; X64-NEXT: .LBB0_3:
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; X64-NEXT: testq %rax, %rax
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; X64-NEXT: setne -{{[0-9]+}}(%rsp)
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; X64-NEXT: retq
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%1 = alloca i8, align 1
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%2 = load i64, i64* @d, align 8
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%3 = or i64 -3013716102214263007, %2
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%4 = xor i64 %3, -1
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%5 = load i64, i64* @e, align 8
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%6 = load i8, i8* @b, align 1
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%7 = trunc i8 %6 to i1
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%8 = zext i1 %7 to i64
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%9 = xor i64 %5, %8
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%10 = load i8, i8* @c, align 1
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%11 = trunc i8 %10 to i1
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%12 = zext i1 %11 to i32
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%13 = or i32 551409149, %12
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%14 = sub nsw i32 %13, 551409131
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%15 = zext i32 %14 to i64
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%16 = shl i64 %9, %15
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%17 = sub nsw i64 %16, 223084523
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%18 = ashr i64 %4, %17
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%19 = and i64 %18, 9223372036854775806
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%20 = add nsw i64 7, %19
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%21 = sdiv i64 0, %20
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%22 = icmp ne i64 %21, 0
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%23 = zext i1 %22 to i8
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store i8 %23, i8* %1, align 1
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ret void
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}
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