43e94b15ea
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
35 lines
733 B
YAML
35 lines
733 B
YAML
# RUN: llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none | FileCheck %s
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# This should cleanly pass the machine verifier
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---
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# CHECK-LABEL: name: func0
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# CHECK: %0:gr32 = PHI undef %1:gr32, %bb.0, undef %1:gr32, %bb.1
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name: func0
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tracksRegLiveness: true
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body: |
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bb.0:
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JE_1 %bb.1, implicit undef $eflags
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JMP_1 %bb.2
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bb.1:
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bb.2:
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%0 : gr32 = PHI undef %1 : gr32, %bb.0, undef %1 : gr32, %bb.1
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...
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---
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# CHECK-LABEL: name: func1
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# CHECK: %2:gr32 = PHI %0, %bb.0, %1, %bb.1
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name: func1
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tracksRegLiveness: true
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body: |
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bb.0:
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%0 : gr32 = IMPLICIT_DEF
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JE_1 %bb.1, implicit undef $eflags
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JMP_1 %bb.2
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bb.1:
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%1 : gr32 = IMPLICIT_DEF
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bb.2:
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%2 : gr32 = PHI %0, %bb.0, %1, %bb.1
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...
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