caio/clang-p2996
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
c8dbdfd4ba366a95d8325a8dce6cbd8cbf4e63c3
clang-p2996/llvm/test/CodeGen/MSP430
History
Owen Anderson 5e4734245d CombinerAA is now reordering these stores. 
llvm-svn: 114354
2010-09-20 20:56:29 +00:00
..
2009-05-10-CyclicDAG.ll
…
2009-05-17-Rot.ll
add newlines at the end of files.
2010-04-07 22:53:17 +00:00
2009-05-17-Shift.ll
add newlines at the end of files.
2010-04-07 22:53:17 +00:00
2009-05-19-DoubleSplit.ll
…
2009-08-25-DynamicStackAlloc.ll
…
2009-09-18-AbsoluteAddr.ll
…
2009-10-10-OrImpDef.ll
…
2009-11-05-8BitLibcalls.ll
…
2009-11-08-InvalidResNo.ll
…
2009-11-20-NewNode.ll
…
2009-12-21-FrameAddr.ll
…
2009-12-22-InlineAsm.ll
…
2010-04-07-DbgValueOtherTargets.ll
Split big test into multiple directories to cater to
2010-04-07 20:43:35 +00:00
2010-05-01-CombinerAnd.ll
Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),
2010-05-01 12:52:34 +00:00
AddrMode-bis-rx.ll
Do not use '&' prefix for globals when register base field is non-zero, otherwise msp430-as will silently miscompile the code (TI's assembler report an error though).
2010-03-06 11:41:12 +00:00
AddrMode-bis-xr.ll
Do not use '&' prefix for globals when register base field is non-zero, otherwise msp430-as will silently miscompile the code (TI's assembler report an error though).
2010-03-06 11:41:12 +00:00
AddrMode-mov-rx.ll
Do not use '&' prefix for globals when register base field is non-zero, otherwise msp430-as will silently miscompile the code (TI's assembler report an error though).
2010-03-06 11:41:12 +00:00
AddrMode-mov-xr.ll
Do not use '&' prefix for globals when register base field is non-zero, otherwise msp430-as will silently miscompile the code (TI's assembler report an error though).
2010-03-06 11:41:12 +00:00
bit.ll
no need to run llvm-as here.
2010-02-22 23:34:12 +00:00
dg.exp
…
indirectbr2.ll
Do folding for indirect branches, where possible
2010-05-01 12:28:21 +00:00
indirectbr.ll
Implement indirect branches on MSP430
2010-05-01 12:04:32 +00:00
inline-asm.ll
…
Inst8mi.ll
…
Inst8mm.ll
…
Inst8mr.ll
…
Inst8ri.ll
…
Inst8rm.ll
…
Inst8rr.ll
Change the scheduler from adding nodes in allnodes order
2010-02-24 06:11:37 +00:00
Inst16mi.ll
…
Inst16mm.ll
CombinerAA is now reordering these stores.
2010-09-20 20:56:29 +00:00
Inst16mr.ll
…
Inst16ri.ll
…
Inst16rm.ll
…
Inst16rr.ll
…
postinc.ll
…
setcc.ll
IT turns out that during jumpless setcc lowering eq and ne were swapped.
2010-02-21 12:28:58 +00:00
shifts.ll
Add variable-width shifts for MSP430
2010-01-14 22:09:38 +00:00