f8325f1260
VarLenCodeEmitterGen produced code that did not compile if using
alternative encoding in different HwModes. It's not possbile to assign
unsigned **Index = Index_<mode>[][2] = { ... };
As a fix, Index and InstBits where removed in favor of mode specific
getInstBits_<mode> functions since this is the only place the arrays are
accessed.
Handling of HwModes is now concentrated to the VarLenCodeEmitterGen::run
method reducing the overall amount of code and enabling other types of
alternative encodings not related to HwModes.
Added a test for VarLenCodeEmitterGen HwModes.
Make sure that HwModes are supported in the same way they are supported
for the standard CodeEmitter. It should be possible to define
instructions with universal encoding across modes, distinct encodings
for each mode or only define encodings for some modes.
Fixed indentation in generated code.
518 lines
19 KiB
C++
518 lines
19 KiB
C++
//===- VarLenCodeEmitterGen.cpp - CEG for variable-length insts -----------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// The CodeEmitterGen component for variable-length instructions.
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//
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// The basic CodeEmitterGen is almost exclusively designed for fixed-
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// length instructions. A good analogy for its encoding scheme is how printf
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// works: The (immutable) formatting string represent the fixed values in the
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// encoded instruction. Placeholders (i.e. %something), on the other hand,
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// represent encoding for instruction operands.
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// ```
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// printf("1101 %src 1001 %dst", <encoded value for operand `src`>,
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// <encoded value for operand `dst`>);
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// ```
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// VarLenCodeEmitterGen in this file provides an alternative encoding scheme
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// that works more like a C++ stream operator:
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// ```
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// OS << 0b1101;
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// if (Cond)
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// OS << OperandEncoding0;
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// OS << 0b1001 << OperandEncoding1;
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// ```
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// You are free to concatenate arbitrary types (and sizes) of encoding
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// fragments on any bit position, bringing more flexibilities on defining
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// encoding for variable-length instructions.
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//
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// In a more specific way, instruction encoding is represented by a DAG type
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// `Inst` field. Here is an example:
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// ```
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// dag Inst = (descend 0b1101, (operand "$src", 4), 0b1001,
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// (operand "$dst", 4));
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// ```
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// It represents the following instruction encoding:
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// ```
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// MSB LSB
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// 1101<encoding for operand src>1001<encoding for operand dst>
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// ```
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// For more details about DAG operators in the above snippet, please
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// refer to \file include/llvm/Target/Target.td.
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//
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// VarLenCodeEmitter will convert the above DAG into the same helper function
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// generated by CodeEmitter, `MCCodeEmitter::getBinaryCodeForInstr` (except
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// for few details).
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//
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//===----------------------------------------------------------------------===//
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#include "VarLenCodeEmitterGen.h"
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#include "CodeGenHwModes.h"
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#include "CodeGenInstruction.h"
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#include "CodeGenTarget.h"
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#include "InfoByHwMode.h"
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/TableGen/Error.h"
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#include "llvm/TableGen/Record.h"
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using namespace llvm;
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namespace {
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class VarLenCodeEmitterGen {
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RecordKeeper &Records;
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// Representaton of alternative encodings used for HwModes.
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using AltEncodingTy = int;
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// Mode identifier when only one encoding is defined.
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const AltEncodingTy Universal = -1;
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// The set of alternative instruction encodings with a descriptive
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// name suffix to improve readability of the generated code.
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std::map<AltEncodingTy, std::string> Modes;
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DenseMap<Record *, DenseMap<AltEncodingTy, VarLenInst>> VarLenInsts;
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// Emit based values (i.e. fixed bits in the encoded instructions)
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void emitInstructionBaseValues(
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raw_ostream &OS,
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ArrayRef<const CodeGenInstruction *> NumberedInstructions,
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CodeGenTarget &Target, AltEncodingTy Mode);
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std::string getInstructionCases(Record *R, CodeGenTarget &Target);
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std::string getInstructionCaseForEncoding(Record *R, AltEncodingTy Mode,
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const VarLenInst &VLI,
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CodeGenTarget &Target, int I);
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public:
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explicit VarLenCodeEmitterGen(RecordKeeper &R) : Records(R) {}
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void run(raw_ostream &OS);
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};
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} // end anonymous namespace
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// Get the name of custom encoder or decoder, if there is any.
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// Returns `{encoder name, decoder name}`.
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static std::pair<StringRef, StringRef> getCustomCoders(ArrayRef<Init *> Args) {
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std::pair<StringRef, StringRef> Result;
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for (const auto *Arg : Args) {
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const auto *DI = dyn_cast<DagInit>(Arg);
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if (!DI)
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continue;
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const Init *Op = DI->getOperator();
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if (!isa<DefInit>(Op))
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continue;
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// syntax: `(<encoder | decoder> "function name")`
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StringRef OpName = cast<DefInit>(Op)->getDef()->getName();
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if (OpName != "encoder" && OpName != "decoder")
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continue;
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if (!DI->getNumArgs() || !isa<StringInit>(DI->getArg(0)))
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PrintFatalError("expected '" + OpName +
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"' directive to be followed by a custom function name.");
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StringRef FuncName = cast<StringInit>(DI->getArg(0))->getValue();
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if (OpName == "encoder")
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Result.first = FuncName;
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else
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Result.second = FuncName;
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}
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return Result;
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}
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VarLenInst::VarLenInst(const DagInit *DI, const RecordVal *TheDef)
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: TheDef(TheDef), NumBits(0U), HasDynamicSegment(false) {
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buildRec(DI);
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for (const auto &S : Segments)
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NumBits += S.BitWidth;
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}
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void VarLenInst::buildRec(const DagInit *DI) {
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assert(TheDef && "The def record is nullptr ?");
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std::string Op = DI->getOperator()->getAsString();
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if (Op == "ascend" || Op == "descend") {
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bool Reverse = Op == "descend";
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int i = Reverse ? DI->getNumArgs() - 1 : 0;
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int e = Reverse ? -1 : DI->getNumArgs();
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int s = Reverse ? -1 : 1;
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for (; i != e; i += s) {
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const Init *Arg = DI->getArg(i);
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if (const auto *BI = dyn_cast<BitsInit>(Arg)) {
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if (!BI->isComplete())
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PrintFatalError(TheDef->getLoc(),
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"Expecting complete bits init in `" + Op + "`");
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Segments.push_back({BI->getNumBits(), BI});
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} else if (const auto *BI = dyn_cast<BitInit>(Arg)) {
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if (!BI->isConcrete())
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PrintFatalError(TheDef->getLoc(),
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"Expecting concrete bit init in `" + Op + "`");
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Segments.push_back({1, BI});
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} else if (const auto *SubDI = dyn_cast<DagInit>(Arg)) {
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buildRec(SubDI);
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} else {
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PrintFatalError(TheDef->getLoc(), "Unrecognized type of argument in `" +
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Op + "`: " + Arg->getAsString());
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}
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}
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} else if (Op == "operand") {
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// (operand <operand name>, <# of bits>,
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// [(encoder <custom encoder>)][, (decoder <custom decoder>)])
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if (DI->getNumArgs() < 2)
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PrintFatalError(TheDef->getLoc(),
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"Expecting at least 2 arguments for `operand`");
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HasDynamicSegment = true;
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const Init *OperandName = DI->getArg(0), *NumBits = DI->getArg(1);
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if (!isa<StringInit>(OperandName) || !isa<IntInit>(NumBits))
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PrintFatalError(TheDef->getLoc(), "Invalid argument types for `operand`");
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auto NumBitsVal = cast<IntInit>(NumBits)->getValue();
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if (NumBitsVal <= 0)
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PrintFatalError(TheDef->getLoc(), "Invalid number of bits for `operand`");
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auto [CustomEncoder, CustomDecoder] =
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getCustomCoders(DI->getArgs().slice(2));
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Segments.push_back({static_cast<unsigned>(NumBitsVal), OperandName,
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CustomEncoder, CustomDecoder});
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} else if (Op == "slice") {
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// (slice <operand name>, <high / low bit>, <low / high bit>,
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// [(encoder <custom encoder>)][, (decoder <custom decoder>)])
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if (DI->getNumArgs() < 3)
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PrintFatalError(TheDef->getLoc(),
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"Expecting at least 3 arguments for `slice`");
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HasDynamicSegment = true;
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Init *OperandName = DI->getArg(0), *HiBit = DI->getArg(1),
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*LoBit = DI->getArg(2);
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if (!isa<StringInit>(OperandName) || !isa<IntInit>(HiBit) ||
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!isa<IntInit>(LoBit))
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PrintFatalError(TheDef->getLoc(), "Invalid argument types for `slice`");
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auto HiBitVal = cast<IntInit>(HiBit)->getValue(),
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LoBitVal = cast<IntInit>(LoBit)->getValue();
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if (HiBitVal < 0 || LoBitVal < 0)
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PrintFatalError(TheDef->getLoc(), "Invalid bit range for `slice`");
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bool NeedSwap = false;
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unsigned NumBits = 0U;
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if (HiBitVal < LoBitVal) {
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NeedSwap = true;
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NumBits = static_cast<unsigned>(LoBitVal - HiBitVal + 1);
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} else {
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NumBits = static_cast<unsigned>(HiBitVal - LoBitVal + 1);
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}
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auto [CustomEncoder, CustomDecoder] =
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getCustomCoders(DI->getArgs().slice(3));
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if (NeedSwap) {
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// Normalization: Hi bit should always be the second argument.
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Init *const NewArgs[] = {OperandName, LoBit, HiBit};
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Segments.push_back({NumBits,
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DagInit::get(DI->getOperator(), nullptr, NewArgs, {}),
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CustomEncoder, CustomDecoder});
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} else {
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Segments.push_back({NumBits, DI, CustomEncoder, CustomDecoder});
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}
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}
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}
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void VarLenCodeEmitterGen::run(raw_ostream &OS) {
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CodeGenTarget Target(Records);
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auto Insts = Records.getAllDerivedDefinitions("Instruction");
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auto NumberedInstructions = Target.getInstructionsByEnumValue();
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for (const CodeGenInstruction *CGI : NumberedInstructions) {
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Record *R = CGI->TheDef;
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// Create the corresponding VarLenInst instance.
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if (R->getValueAsString("Namespace") == "TargetOpcode" ||
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R->getValueAsBit("isPseudo"))
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continue;
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// Setup alternative encodings according to HwModes
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if (const RecordVal *RV = R->getValue("EncodingInfos")) {
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if (auto *DI = dyn_cast_or_null<DefInit>(RV->getValue())) {
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const CodeGenHwModes &HWM = Target.getHwModes();
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EncodingInfoByHwMode EBM(DI->getDef(), HWM);
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for (auto &KV : EBM) {
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AltEncodingTy Mode = KV.first;
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Modes.insert({Mode, "_" + HWM.getMode(Mode).Name.str()});
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Record *EncodingDef = KV.second;
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RecordVal *RV = EncodingDef->getValue("Inst");
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DagInit *DI = cast<DagInit>(RV->getValue());
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VarLenInsts[R].insert({Mode, VarLenInst(DI, RV)});
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}
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continue;
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}
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}
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RecordVal *RV = R->getValue("Inst");
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DagInit *DI = cast<DagInit>(RV->getValue());
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VarLenInsts[R].insert({Universal, VarLenInst(DI, RV)});
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}
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if (Modes.empty())
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Modes.insert({Universal, ""}); // Base case, skip suffix.
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// Emit function declaration
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OS << "void " << Target.getName()
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<< "MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,\n"
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<< " SmallVectorImpl<MCFixup> &Fixups,\n"
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<< " APInt &Inst,\n"
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<< " APInt &Scratch,\n"
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<< " const MCSubtargetInfo &STI) const {\n";
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// Emit instruction base values
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for (const auto &Mode : Modes)
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emitInstructionBaseValues(OS, NumberedInstructions, Target, Mode.first);
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if (Modes.size() > 1) {
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OS << " unsigned Mode = STI.getHwMode();\n";
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}
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for (const auto &Mode : Modes) {
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// Emit helper function to retrieve base values.
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OS << " auto getInstBits" << Mode.second
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<< " = [&](unsigned Opcode) -> APInt {\n"
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<< " unsigned NumBits = Index" << Mode.second << "[Opcode][0];\n"
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<< " if (!NumBits)\n"
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<< " return APInt::getZeroWidth();\n"
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<< " unsigned Idx = Index" << Mode.second << "[Opcode][1];\n"
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<< " ArrayRef<uint64_t> Data(&InstBits" << Mode.second << "[Idx], "
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<< "APInt::getNumWords(NumBits));\n"
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<< " return APInt(NumBits, Data);\n"
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<< " };\n";
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}
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// Map to accumulate all the cases.
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std::map<std::string, std::vector<std::string>> CaseMap;
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// Construct all cases statement for each opcode
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for (Record *R : Insts) {
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if (R->getValueAsString("Namespace") == "TargetOpcode" ||
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R->getValueAsBit("isPseudo"))
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continue;
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std::string InstName =
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(R->getValueAsString("Namespace") + "::" + R->getName()).str();
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std::string Case = getInstructionCases(R, Target);
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CaseMap[Case].push_back(std::move(InstName));
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}
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// Emit initial function code
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OS << " const unsigned opcode = MI.getOpcode();\n"
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<< " switch (opcode) {\n";
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// Emit each case statement
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for (const auto &C : CaseMap) {
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const std::string &Case = C.first;
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const auto &InstList = C.second;
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ListSeparator LS("\n");
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for (const auto &InstName : InstList)
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OS << LS << " case " << InstName << ":";
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OS << " {\n";
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OS << Case;
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OS << " break;\n"
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<< " }\n";
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}
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// Default case: unhandled opcode
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OS << " default:\n"
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<< " std::string msg;\n"
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<< " raw_string_ostream Msg(msg);\n"
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<< " Msg << \"Not supported instr: \" << MI;\n"
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<< " report_fatal_error(Msg.str().c_str());\n"
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<< " }\n";
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OS << "}\n\n";
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}
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static void emitInstBits(raw_ostream &IS, raw_ostream &SS, const APInt &Bits,
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unsigned &Index) {
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if (!Bits.getNumWords()) {
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IS.indent(4) << "{/*NumBits*/0, /*Index*/0},";
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return;
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}
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IS.indent(4) << "{/*NumBits*/" << Bits.getBitWidth() << ", "
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<< "/*Index*/" << Index << "},";
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SS.indent(4);
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for (unsigned I = 0; I < Bits.getNumWords(); ++I, ++Index)
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SS << "UINT64_C(" << utostr(Bits.getRawData()[I]) << "),";
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}
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void VarLenCodeEmitterGen::emitInstructionBaseValues(
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raw_ostream &OS, ArrayRef<const CodeGenInstruction *> NumberedInstructions,
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CodeGenTarget &Target, AltEncodingTy Mode) {
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std::string IndexArray, StorageArray;
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raw_string_ostream IS(IndexArray), SS(StorageArray);
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IS << " static const unsigned Index" << Modes[Mode] << "[][2] = {\n";
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SS << " static const uint64_t InstBits" << Modes[Mode] << "[] = {\n";
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unsigned NumFixedValueWords = 0U;
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for (const CodeGenInstruction *CGI : NumberedInstructions) {
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Record *R = CGI->TheDef;
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if (R->getValueAsString("Namespace") == "TargetOpcode" ||
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R->getValueAsBit("isPseudo")) {
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IS.indent(4) << "{/*NumBits*/0, /*Index*/0},\n";
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continue;
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}
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const auto InstIt = VarLenInsts.find(R);
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if (InstIt == VarLenInsts.end())
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PrintFatalError(R, "VarLenInst not found for this record");
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auto ModeIt = InstIt->second.find(Mode);
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if (ModeIt == InstIt->second.end())
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ModeIt = InstIt->second.find(Universal);
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if (ModeIt == InstIt->second.end()) {
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IS.indent(4) << "{/*NumBits*/0, /*Index*/0},\t"
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<< "// " << R->getName() << " no encoding\n";
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continue;
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}
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const VarLenInst &VLI = ModeIt->second;
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unsigned i = 0U, BitWidth = VLI.size();
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// Start by filling in fixed values.
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APInt Value(BitWidth, 0);
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auto SI = VLI.begin(), SE = VLI.end();
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// Scan through all the segments that have fixed-bits values.
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while (i < BitWidth && SI != SE) {
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unsigned SegmentNumBits = SI->BitWidth;
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if (const auto *BI = dyn_cast<BitsInit>(SI->Value)) {
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for (unsigned Idx = 0U; Idx != SegmentNumBits; ++Idx) {
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auto *B = cast<BitInit>(BI->getBit(Idx));
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Value.setBitVal(i + Idx, B->getValue());
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}
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}
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if (const auto *BI = dyn_cast<BitInit>(SI->Value))
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Value.setBitVal(i, BI->getValue());
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i += SegmentNumBits;
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++SI;
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}
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emitInstBits(IS, SS, Value, NumFixedValueWords);
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IS << '\t' << "// " << R->getName() << "\n";
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if (Value.getNumWords())
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SS << '\t' << "// " << R->getName() << "\n";
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}
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IS.indent(4) << "{/*NumBits*/0, /*Index*/0}\n };\n";
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SS.indent(4) << "UINT64_C(0)\n };\n";
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OS << IS.str() << SS.str();
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}
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std::string VarLenCodeEmitterGen::getInstructionCases(Record *R,
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CodeGenTarget &Target) {
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auto It = VarLenInsts.find(R);
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if (It == VarLenInsts.end())
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PrintFatalError(R, "Parsed encoding record not found");
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const auto &Map = It->second;
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// Is this instructions encoding universal (same for all modes)?
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// Allways true if there is only one mode.
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if (Map.size() == 1 && Map.begin()->first == Universal) {
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// Universal, just pick the first mode.
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AltEncodingTy Mode = Modes.begin()->first;
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const auto &Encoding = Map.begin()->second;
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return getInstructionCaseForEncoding(R, Mode, Encoding, Target, 6);
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}
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std::string Case;
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Case += " switch (Mode) {\n";
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Case += " default: llvm_unreachable(\"Unhandled Mode\");\n";
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for (const auto &Mode : Modes) {
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Case += " case " + itostr(Mode.first) + ": {\n";
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const auto &It = Map.find(Mode.first);
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if (It == Map.end()) {
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Case +=
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" llvm_unreachable(\"Undefined encoding in this mode\");\n";
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} else {
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Case +=
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getInstructionCaseForEncoding(R, It->first, It->second, Target, 8);
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}
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Case += " break;\n";
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Case += " }\n";
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}
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Case += " }\n";
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return Case;
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}
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std::string VarLenCodeEmitterGen::getInstructionCaseForEncoding(
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Record *R, AltEncodingTy Mode, const VarLenInst &VLI, CodeGenTarget &Target,
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int I) {
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size_t BitWidth = VLI.size();
|
|
|
|
CodeGenInstruction &CGI = Target.getInstruction(R);
|
|
|
|
std::string Case;
|
|
raw_string_ostream SS(Case);
|
|
// Resize the scratch buffer.
|
|
if (BitWidth && !VLI.isFixedValueOnly())
|
|
SS.indent(I) << "Scratch = Scratch.zext(" << BitWidth << ");\n";
|
|
// Populate based value.
|
|
SS.indent(I) << "Inst = getInstBits" << Modes[Mode] << "(opcode);\n";
|
|
|
|
// Process each segment in VLI.
|
|
size_t Offset = 0U;
|
|
for (const auto &ES : VLI) {
|
|
unsigned NumBits = ES.BitWidth;
|
|
const Init *Val = ES.Value;
|
|
// If it's a StringInit or DagInit, it's a reference to an operand
|
|
// or part of an operand.
|
|
if (isa<StringInit>(Val) || isa<DagInit>(Val)) {
|
|
StringRef OperandName;
|
|
unsigned LoBit = 0U;
|
|
if (const auto *SV = dyn_cast<StringInit>(Val)) {
|
|
OperandName = SV->getValue();
|
|
} else {
|
|
// Normalized: (slice <operand name>, <high bit>, <low bit>)
|
|
const auto *DV = cast<DagInit>(Val);
|
|
OperandName = cast<StringInit>(DV->getArg(0))->getValue();
|
|
LoBit = static_cast<unsigned>(cast<IntInit>(DV->getArg(2))->getValue());
|
|
}
|
|
|
|
auto OpIdx = CGI.Operands.ParseOperandName(OperandName);
|
|
unsigned FlatOpIdx = CGI.Operands.getFlattenedOperandNumber(OpIdx);
|
|
StringRef CustomEncoder =
|
|
CGI.Operands[OpIdx.first].EncoderMethodNames[OpIdx.second];
|
|
if (ES.CustomEncoder.size())
|
|
CustomEncoder = ES.CustomEncoder;
|
|
|
|
SS.indent(I) << "Scratch.clearAllBits();\n";
|
|
SS.indent(I) << "// op: " << OperandName.drop_front(1) << "\n";
|
|
if (CustomEncoder.empty())
|
|
SS.indent(I) << "getMachineOpValue(MI, MI.getOperand("
|
|
<< utostr(FlatOpIdx) << ")";
|
|
else
|
|
SS.indent(I) << CustomEncoder << "(MI, /*OpIdx=*/" << utostr(FlatOpIdx);
|
|
|
|
SS << ", /*Pos=*/" << utostr(Offset) << ", Scratch, Fixups, STI);\n";
|
|
|
|
SS.indent(I) << "Inst.insertBits("
|
|
<< "Scratch.extractBits(" << utostr(NumBits) << ", "
|
|
<< utostr(LoBit) << ")"
|
|
<< ", " << Offset << ");\n";
|
|
}
|
|
Offset += NumBits;
|
|
}
|
|
|
|
StringRef PostEmitter = R->getValueAsString("PostEncoderMethod");
|
|
if (!PostEmitter.empty())
|
|
SS.indent(I) << "Inst = " << PostEmitter << "(MI, Inst, STI);\n";
|
|
|
|
return Case;
|
|
}
|
|
|
|
namespace llvm {
|
|
|
|
void emitVarLenCodeEmitter(RecordKeeper &R, raw_ostream &OS) {
|
|
VarLenCodeEmitterGen(R).run(OS);
|
|
}
|
|
|
|
} // end namespace llvm
|