Matt Arsenault ca9583a70a AMDGPU/GlobalISel: Fix broken tests ...

llvm-svn: 353559

2019-02-08 19:59:39 +00:00

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AArch64

[DAGCombine] Optimize pow(X, 0.75) to sqrt(X) * sqrt(sqrt(X))

2019-02-08 19:50:58 +00:00

AMDGPU

AMDGPU/GlobalISel: Fix broken tests

2019-02-08 19:59:39 +00:00

ARC

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ARM

[DAGCombine] Optimize pow(X, 0.75) to sqrt(X) * sqrt(sqrt(X))

2019-02-08 19:50:58 +00:00

AVR

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BPF

[BPF] [BTF] Process FileName with absolute path correctly

2019-02-02 05:54:59 +00:00

Generic

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Hexagon

[PatternMatch] add special-case uaddo matching for increment-by-one (2nd try)

2019-02-03 16:16:48 +00:00

Inputs

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Lanai

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Mips

[MIPS GlobalISel] Select any extending load and truncating store

2019-02-08 14:27:23 +00:00

MIR

[X86] Add FPCW as a register and start using it as an implicit use on floating point instructions.

2019-02-08 00:44:39 +00:00

MSP430

Enable integrated assembler on MSP430 by default.

2019-02-05 18:01:45 +00:00

NVPTX

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PowerPC

[DAGCombine] Optimize pow(X, 0.75) to sqrt(X) * sqrt(sqrt(X))

2019-02-08 19:50:58 +00:00

RISCV

[RISCV] Implement RV64D codegen

2019-02-01 03:53:30 +00:00

SPARC

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SystemZ

[SystemZ] Improved handling of the @llvm.ctlz intrinsic.

2019-02-06 19:23:31 +00:00

Thumb

[ARM] Mark 255 and 65535 as cheap for Thumb1 "And"

2019-02-04 11:58:48 +00:00

Thumb2

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WebAssembly

[WebAssembly] Lower memmove to memory.copy

2019-02-05 20:57:40 +00:00

WinCFGuard

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WinEH

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X86

[DAGCombine] Optimize pow(X, 0.75) to sqrt(X) * sqrt(sqrt(X))

2019-02-08 19:50:58 +00:00

XCore

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