Roman Tereshin d29fc89222 [MachineVerifier][GlobalISel] Checking that generic instrs have LLTs on all vregs ...

Every generic machine instruction must have generic virtual registers
only, that is, have a low-level type attached to each operand.

Previously MachineVerifier would catch a type missing on an operand
only if the previous operand for the the same type index exists and
have a type attached to it and it will report it as a type mismatch.
This is incosistent behaviour and a misleading error message.

This commit makes sure MachineVerifier explicitly checks that the
types are there for every operand and if not provides a
straightforward error message.

Reviewers: qcolombet t.p.northover bogner ab

Reviewed By: qcolombet

Subscribers: rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D46455

llvm-svn: 331694

2018-05-07 22:31:47 +00:00

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