0fe61ecc2c
LLVM loops cannot represent irreducible structures in the CFG. This change introduce the concept of cycles as a generalization of loops, along with a CycleInfo analysis that discovers a nested hierarchy of such cycles. This is based on Havlak (1997), Nesting of Reducible and Irreducible Loops. The cycle analysis is implemented as a generic template and then instatiated for LLVM IR and Machine IR. The template relies on a new GenericSSAContext template which must be specialized when used for each IR. This review is a restart of an older review request: https://reviews.llvm.org/D83094 Original implementation by Nicolai Hähnle <nicolai.haehnle@amd.com>, with recent refactoring by Sameer Sahasrabuddhe <sameer.sahasrabuddhe@amd.com> Differential Revision: https://reviews.llvm.org/D112696
88 lines
3.0 KiB
C++
88 lines
3.0 KiB
C++
//===- MachineCycleAnalysis.cpp - Compute CycleInfo for Machine IR --------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineCycleAnalysis.h"
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#include "llvm/ADT/GenericCycleImpl.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineSSAContext.h"
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#include "llvm/InitializePasses.h"
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using namespace llvm;
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template class llvm::GenericCycleInfo<llvm::MachineSSAContext>;
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template class llvm::GenericCycle<llvm::MachineSSAContext>;
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//===----------------------------------------------------------------------===//
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// MachineCycleInfoWrapperPass Implementation
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//===----------------------------------------------------------------------===//
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//
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// The implementation details of the wrapper pass that holds a MachineCycleInfo
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// suitable for use with the legacy pass manager.
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//
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//===----------------------------------------------------------------------===//
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char MachineCycleInfoWrapperPass::ID = 0;
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MachineCycleInfoWrapperPass::MachineCycleInfoWrapperPass()
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: MachineFunctionPass(ID) {
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initializeMachineCycleInfoWrapperPassPass(*PassRegistry::getPassRegistry());
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}
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INITIALIZE_PASS_BEGIN(MachineCycleInfoWrapperPass, "machine-cycles",
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"Machine Cycle Info Analysis", true, true)
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INITIALIZE_PASS_END(MachineCycleInfoWrapperPass, "machine-cycles",
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"Machine Cycle Info Analysis", true, true)
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void MachineCycleInfoWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool MachineCycleInfoWrapperPass::runOnMachineFunction(MachineFunction &Func) {
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CI.clear();
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F = &Func;
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CI.compute(Func);
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return false;
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}
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void MachineCycleInfoWrapperPass::print(raw_ostream &OS, const Module *) const {
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OS << "MachineCycleInfo for function: " << F->getName() << "\n";
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CI.print(OS);
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}
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void MachineCycleInfoWrapperPass::releaseMemory() {
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CI.clear();
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F = nullptr;
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}
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char MachineCycleInfoPrinterPass::ID = 0;
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MachineCycleInfoPrinterPass::MachineCycleInfoPrinterPass()
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: MachineFunctionPass(ID) {
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initializeMachineCycleInfoPrinterPassPass(*PassRegistry::getPassRegistry());
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}
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INITIALIZE_PASS_BEGIN(MachineCycleInfoPrinterPass, "print-machine-cycles",
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"Print Machine Cycle Info Analysis", true, true)
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INITIALIZE_PASS_DEPENDENCY(MachineCycleInfoWrapperPass)
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INITIALIZE_PASS_END(MachineCycleInfoPrinterPass, "print-machine-cycles",
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"Print Machine Cycle Info Analysis", true, true)
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void MachineCycleInfoPrinterPass::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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AU.addRequired<MachineCycleInfoWrapperPass>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool MachineCycleInfoPrinterPass::runOnMachineFunction(MachineFunction &F) {
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auto &CI = getAnalysis<MachineCycleInfoWrapperPass>();
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CI.print(errs());
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return false;
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}
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