Craig Topper ebe1ece4bb [TableGen][RISCV] Support sub-operands in CompressInstEmitter.cpp. (#133039) ...

I'm looking into using sub-operands for memory operands. This would use
MIOperandInfo to create a single operand that contains a register and
immediate as sub-operands. We can treat this as a single operand for
parsing and matching in the assembler. I believe this will provide some
simplifications like removing the InstAliases we need to support "(rs1)"
without an immediate.

Doing this requires making CompressInstEmitter aware of sub-operands.

I've chosen to use a flat list of operands in the CompressPats so each
sub-operand is represented individually.

2025-03-27 19:10:40 -07:00

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