1b39328d74
Even if an inline asm doesn't have memory effects, we can't assume it's safe to speculate: it could trap, or cause undefined behavior. At the LLVM IR level, this is handled correctly: we don't speculate inline asm (unless it's marked "speculatable", but I don't think anyone does that). Codegen also needs to respect this restriction. This change stops Early If Conversion and similar passes from speculating an INLINEASM MachineInstr. Some uses of isSafeToMove probably could be switched to a different API: isSafeToMove assumes you're hoisting, but we could handle some forms of sinking more aggressively. But I'll leave that for a followup, if it turns out to be relevant. See also discussion on gcc bugtracker https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102150 .
47 lines
1.5 KiB
LLVM
47 lines
1.5 KiB
LLVM
; RUN: llc -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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; GCN-LABEL: {{^}}convergent_inlineasm:
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; GCN: %bb.0:
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; GCN: v_cmp_ne_u32_e64
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; GCN: s_cbranch_execz
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; GCN: ; %bb.{{[0-9]+}}:
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define amdgpu_kernel void @convergent_inlineasm(ptr addrspace(1) nocapture %arg) {
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bb:
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%tmp = call i32 @llvm.amdgcn.workitem.id.x()
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%tmp1 = tail call i64 asm "v_cmp_ne_u32_e64 $0, 0, $1", "=s,v"(i32 1) #1
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%tmp2 = icmp eq i32 %tmp, 8
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br i1 %tmp2, label %bb3, label %bb5
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bb3: ; preds = %bb
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%tmp4 = getelementptr i64, ptr addrspace(1) %arg, i32 %tmp
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store i64 %tmp1, ptr addrspace(1) %arg, align 8
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br label %bb5
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bb5: ; preds = %bb3, %bb
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ret void
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}
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; GCN-LABEL: {{^}}nonconvergent_inlineasm:
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; GCN: v_cmp_ne_u32_e64
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; GCN: s_cbranch_execz
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define amdgpu_kernel void @nonconvergent_inlineasm(ptr addrspace(1) nocapture %arg) {
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bb:
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%tmp = call i32 @llvm.amdgcn.workitem.id.x()
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%tmp1 = tail call i64 asm "v_cmp_ne_u32_e64 $0, 0, $1", "=s,v"(i32 1)
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%tmp2 = icmp eq i32 %tmp, 8
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br i1 %tmp2, label %bb3, label %bb5
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bb3: ; preds = %bb
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%tmp4 = getelementptr i64, ptr addrspace(1) %arg, i32 %tmp
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store i64 %tmp1, ptr addrspace(1) %arg, align 8
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br label %bb5
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bb5: ; preds = %bb3, %bb
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ret void
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}
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attributes #0 = { nounwind readnone }
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attributes #1 = { convergent nounwind readnone }
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