Weiming Zhao f66be56bf7 Fix PR 18369: [Thumbv8] asserts due to inconsistent CPSR liveness of IT blocks ...

The issue is caused when Post-RA scheduler reorders a bundle instruction
(IT block). However, it only flips the CPSR liveness of the bundle instruction,
leaves the instructions inside the bundle unchanged, which causes inconstancy and crashes
Thumb2SizeReduction.cpp::ReduceMBB().

llvm-svn: 199127

2014-01-13 18:47:54 +00:00

36 KiB

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