clang-p2996

AsmParser

[AMDGPU][MC] Enables sgpr or imm src1 for float VOP3 DPP, but excludi… (#87382 )

2024-04-03 11:34:12 -04:00

Disassembler

[AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (#82992 )

2024-02-26 13:02:08 +00:00

MCA

[AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (#72830 )

2023-12-15 12:33:32 +01:00

MCTargetDesc

[AMDGPU] Use directive for kernarg preload header padding (#86004 )

2024-03-31 11:03:03 -07:00

TargetInfo

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Utils

[AMDGPU] Add a missing COV6 case to getAMDHSACodeObjectVersion() (#87492 )

2024-04-03 15:36:58 -04:00

AMDGPU.h

[AMDGPU] Add IR-level pass to rewrite away address space 7 (#77952 )

2024-03-06 09:49:58 -06:00

AMDGPU.td

[AMDGPU] New clang option for emitting a waitcnt instruction after each memory instruction (#79236 )

2024-04-10 10:47:04 -07:00

AMDGPUAliasAnalysis.cpp

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AMDGPUAliasAnalysis.h

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AMDGPUAlwaysInlinePass.cpp

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AMDGPUAnnotateKernelFeatures.cpp

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AMDGPUAnnotateUniformValues.cpp

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AMDGPUArgumentUsageInfo.cpp

[AMDGPU] Add DAG ISel support for preloaded kernel arguments

2023-09-25 09:32:59 -07:00

AMDGPUArgumentUsageInfo.h

[AMDGPU] Miscellaneous clang-format changes (#75186 )

2023-12-12 14:26:04 +00:00

AMDGPUAsmPrinter.cpp

Reland [AMDGPU] MCExpr-ify MC layer kernel descriptor (#86494 )

2024-03-27 11:59:56 +00:00

AMDGPUAsmPrinter.h

Reland [AMDGPU] MCExpr-ify MC layer kernel descriptor (#86494 )

2024-03-27 11:59:56 +00:00

AMDGPUAtomicOptimizer.cpp

[AMDGPU] Support double type in atomic optimizer. (#84307 )

2024-03-22 09:25:06 +05:30

AMDGPUAttributes.def

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AMDGPUAttributor.cpp

AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948 )

2024-03-21 14:24:06 +05:30

AMDGPUCallingConv.td

Revert "Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226 " (#86273 )

2024-03-26 11:01:08 +01:00

AMDGPUCallLowering.cpp

Revert "Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226 " (#86273 )

2024-03-26 11:01:08 +01:00

AMDGPUCallLowering.h

[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186 )

2023-11-06 12:30:07 +01:00

AMDGPUCodeGenPrepare.cpp

[AMDGPU] Fix missing IsExact flag when expanding vector binary operator (#86712 )

2024-03-27 17:40:58 -04:00

AMDGPUCombine.td

[AMDGPU][GlobalISel] Add fdiv / sqrt to rsq combine (#78673 )

2024-02-22 09:47:36 +01:00

AMDGPUCombinerHelper.cpp

[AMDGPU] Min/max changes for GFX12 (#75214 )

2023-12-13 14:18:10 +01:00

AMDGPUCombinerHelper.h

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AMDGPUCtorDtorLowering.cpp

[llvm] Replace calls to Type::getPointerTo (NFC)

2023-11-30 13:18:51 -06:00

AMDGPUCtorDtorLowering.h

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AMDGPUExportClustering.cpp

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AMDGPUExportClustering.h

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AMDGPUFeatures.td

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AMDGPUFrameLowering.cpp

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AMDGPUFrameLowering.h

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AMDGPUGenRegisterBankInfo.def

Silence illegal address computation warning (#83244 )

2024-03-01 21:41:12 +05:30

AMDGPUGISel.td

[AMDGPU] Add GFX12 WMMA and SWMMAC instructions (#77795 )

2024-01-24 13:43:07 +01:00

AMDGPUGlobalISelDivergenceLowering.cpp

AMDGPU/GlobalISel: lane masks merging (#73337 )

2024-02-29 13:57:59 +01:00

AMDGPUGlobalISelUtils.cpp

[AMDGPU] Remove hasAtomicFaddRtnForTy as it is not used anywhere (#82841 )

2024-02-23 21:14:38 -05:00

AMDGPUGlobalISelUtils.h

[AMDGPU] Remove hasAtomicFaddRtnForTy as it is not used anywhere (#82841 )

2024-02-23 21:14:38 -05:00

AMDGPUHSAMetadataStreamer.cpp

[AMDGPU] Adding the amdgpu_num_work_groups function attribute (#79035 )

2024-03-12 10:30:39 -07:00

AMDGPUHSAMetadataStreamer.h

[AMDGPU] Introduce Code Object V6 (#76954 )

2024-02-05 08:19:53 +01:00

AMDGPUIGroupLP.cpp

[AMDGPU] Do not attempt to fallback to default mutations (#83208 )

2024-02-27 18:04:59 -08:00

AMDGPUIGroupLP.h

[AMDGPU] Do not attempt to fallback to default mutations (#83208 )

2024-02-27 18:04:59 -08:00

AMDGPUImageIntrinsicOptimizer.cpp

[AMDGPU] Use llvm::none_of (NFC)

2024-01-24 00:27:37 -08:00

AMDGPUInsertDelayAlu.cpp

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AMDGPUInsertSingleUseVDST.cpp

[AMDGPU] New AMDGPUInsertSingleUseVDST pass (#72388 )

2023-11-24 10:23:06 +00:00

AMDGPUInstCombineIntrinsic.cpp

[IRBuilder] Fold binary intrinsics (#80743 )

2024-03-15 09:58:25 +01:00

AMDGPUInstrInfo.cpp

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AMDGPUInstrInfo.h

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AMDGPUInstrInfo.td

[AMDGPU] Min/max changes for GFX12 (#75214 )

2023-12-13 14:18:10 +01:00

AMDGPUInstructions.td

[AMDGPU] Fix canonicalization of truncated values. (#83054 )

2024-03-13 12:08:39 +00:00

AMDGPUInstructionSelector.cpp

[AMDGPU] Extend zero initialization of return values for TFE (#85759 )

2024-03-25 09:01:46 +00:00

AMDGPUInstructionSelector.h

[AMDGPU] Clean up functions for checking inline literals (#81282 )

2024-02-15 12:11:51 -05:00

AMDGPUISelDAGToDAG.cpp

[CodeGen] Use LocationSize for MMO getSize (#84751 )

2024-03-17 18:15:56 +00:00

AMDGPUISelDAGToDAG.h

[AMDGPU] Clean up functions for checking inline literals (#81282 )

2024-02-15 12:11:51 -05:00

AMDGPUISelLowering.cpp

[AMDGPU] Use AMDGPU::isIntrinsicAlwaysUniform in isSDNodeAlwaysUniform (#87085 )

2024-03-30 08:01:18 +00:00

AMDGPUISelLowering.h

[AMDGPU] Remove unnecessary add instructions in ctlz.i8 (#77615 )

2024-01-19 10:16:46 +00:00

AMDGPULateCodeGenPrepare.cpp

[AMDGPU] Do not widen scalar loads on GFX12 (#78724 )

2024-01-19 15:30:07 +00:00

AMDGPULegalizerInfo.cpp

[GlobalISel] Introduce G_TRAP, G_DEBUGTRAP, G_UBSANTRAP (#84941 )

2024-03-23 13:12:44 +01:00

AMDGPULegalizerInfo.h

[GlobalISel] Introduce G_TRAP, G_DEBUGTRAP, G_UBSANTRAP (#84941 )

2024-03-23 13:12:44 +01:00

AMDGPULibCalls.cpp

[FPEnv][AMDGPU] Correct AMDGPUSimplifyLibCalls handling of strictfp attribute. (#86705 )

2024-03-27 10:20:00 -04:00

AMDGPULibFunc.cpp

[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956 )

2023-12-11 21:01:36 -08:00

AMDGPULibFunc.h

AMDGPU: Use pown instead of pow if known integral

2023-09-01 08:22:16 -04:00

AMDGPULowerBufferFatPointers.cpp

AMDGPULowerBufferFatPointers.cpp - fix Wunused-variable warning. NFC.

2024-04-04 14:59:01 +01:00

AMDGPULowerKernelArguments.cpp

[AMDGPU] Enable kernel arg preloading with gfx90a (#81180 )

2024-02-12 22:33:29 -08:00

AMDGPULowerKernelAttributes.cpp

[AMDGPU] Add an asm directive to track code_object_version (#76267 )

2024-01-21 11:54:47 -05:00

AMDGPULowerModuleLDSPass.cpp

[AMDGPU][LowerModuleLDS] Refactor partially lowered module detection (#85793 )

2024-03-21 11:28:35 +01:00

AMDGPUMachineCFGStructurizer.cpp

Use object directly instead of accessing ArrayRef (#83263 )

2024-03-01 19:15:42 +05:30

AMDGPUMachineFunction.cpp

[AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (#65273 )

2024-01-04 19:05:12 +05:30

AMDGPUMachineFunction.h

[AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (#65273 )

2024-01-04 19:05:12 +05:30

AMDGPUMachineModuleInfo.cpp

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AMDGPUMachineModuleInfo.h

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AMDGPUMacroFusion.cpp

[DAG] clang-format createBranchMacroFusionDAGMutation calls. NFC.

2023-11-20 12:13:09 +00:00

AMDGPUMacroFusion.h

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AMDGPUMarkLastScratchLoad.cpp

[AMDGPU] Add mark last scratch load pass (#75512 )

2024-01-18 09:36:44 +01:00

AMDGPUMCInstLower.cpp

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AMDGPUMCInstLower.h

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AMDGPUMIRFormatter.cpp

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AMDGPUMIRFormatter.h

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AMDGPUOpenCLEnqueuedBlockLowering.cpp

[NFC] Remove Type::getInt8PtrTy (#71029 )

2023-11-07 17:26:26 +01:00

AMDGPUPassRegistry.def

[NewPM][AMDGPU] Add AMDGPUPassRegistry.def (#86095 )

2024-03-22 08:49:29 +08:00

AMDGPUPerfHintAnalysis.cpp

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AMDGPUPerfHintAnalysis.h

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AMDGPUPostLegalizerCombiner.cpp

[AMDGPU][GlobalISel] Add fdiv / sqrt to rsq combine (#78673 )

2024-02-22 09:47:36 +01:00

AMDGPUPredicateControl.td

[AMDGPU][TableGen][NFC] Combine predicates without using classes. (#82346 )

2024-02-21 11:45:36 +00:00

AMDGPUPreLegalizerCombiner.cpp

[AArch64][GlobalISel] Refactor Combine G_CONCAT_VECTOR (#80866 )

2024-02-15 10:09:20 +00:00

AMDGPUPrintfRuntimeBinding.cpp

[NFC][RemoveDIs] Use iterators for insertion at various call-sites (#84736 )

2024-03-19 16:36:29 +00:00

AMDGPUPromoteAlloca.cpp

[AMDGPU][PromoteAlloca] Whole-function alloca promotion to vector (#84735 )

2024-03-19 11:49:22 +01:00

AMDGPUPromoteKernelArguments.cpp

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AMDGPUPTNote.h

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AMDGPURegBankCombiner.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

AMDGPURegBankSelect.cpp

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AMDGPURegBankSelect.h

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AMDGPURegisterBankInfo.cpp

[AMDGPU] Expose RTZ version of f16 interpolation for gfx11+ (#86614 )

2024-04-01 09:48:37 +08:00

AMDGPURegisterBankInfo.h

[AMDGPU] Make isScalarLoadLegal a member of AMDGPURegisterBankInfo. NFC.

2024-01-09 11:53:12 +00:00

AMDGPURegisterBanks.td

[AMDGPU][True16] Don't use the VGPR_LO/HI16 register classes. (#76440 )

2023-12-28 11:48:25 +00:00

AMDGPURemoveIncompatibleFunctions.cpp

[AMDGPU] Introduce GFX9/10.1/10.3/11 Generic Targets (#76955 )

2024-02-12 10:18:20 +01:00

AMDGPUResourceUsageAnalysis.cpp

[Target][AMDGPU] Fix TSan error on AMDGPU Target. (#79529 )

2024-01-25 21:32:37 -08:00

AMDGPUResourceUsageAnalysis.h

[Target][AMDGPU] Fix TSan error on AMDGPU Target. (#79529 )

2024-01-25 21:32:37 -08:00

AMDGPURewriteOutArguments.cpp

[llvm] Stop including llvm/ADT/SmallSet.h (NFC)

2023-11-11 12:32:15 -08:00

AMDGPURewriteUndefForPHI.cpp

[AMDGPU] Do not preserve UniformityInfo (#76696 )

2024-01-02 13:42:56 +05:30

AMDGPUSearchableTables.td

AMDGPU: Rename intrinsics and remove f16/bf16 versions for load transpose (#86313 )

2024-03-25 16:55:22 -07:00

AMDGPUSetWavePriority.cpp

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AMDGPUSubtarget.cpp

[AMDGPU] Fix implicit $vcc operands after parsing MIR (#87781 )

2024-04-09 09:10:45 +01:00

AMDGPUSubtarget.h

[AMDGPU] Adding the amdgpu_num_work_groups function attribute (#79035 )

2024-03-12 10:30:39 -07:00

AMDGPUTargetMachine.cpp

[NewPM][AMDGPU] Add AMDGPUPassRegistry.def (#86095 )

2024-03-22 08:49:29 +08:00

AMDGPUTargetMachine.h

Restore "Implement convergence control in MIR using SelectionDAG (#71785 )"

2024-03-06 12:19:32 +05:30

AMDGPUTargetObjectFile.cpp

[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956 )

2023-12-11 21:01:36 -08:00

AMDGPUTargetObjectFile.h

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AMDGPUTargetTransformInfo.cpp

[AArch64] Add costs for ST3 and ST4 instructions, modelled as store(shuffle). (#87934 )

2024-04-09 16:36:08 +01:00

AMDGPUTargetTransformInfo.h

[AArch64] Add costs for ST3 and ST4 instructions, modelled as store(shuffle). (#87934 )

2024-04-09 16:36:08 +01:00

AMDGPUUnifyDivergentExitNodes.cpp

[AMDGPU] Do not preserve UniformityInfo (#76696 )

2024-01-02 13:42:56 +05:30

AMDGPUUnifyDivergentExitNodes.h

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AMDGPUUnifyMetadata.cpp

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AMDKernelCodeT.h

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BUFInstructions.td

[AMDGPU] Extend zero initialization of return values for TFE (#85759 )

2024-03-25 09:01:46 +00:00

CaymanInstructions.td

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CMakeLists.txt

[AMDGPU] Add IR-level pass to rewrite away address space 7 (#77952 )

2024-03-06 09:49:58 -06:00

DSDIRInstructions.td

AMDGPU: Use PseudoInstr to name SIMCInstr for DSDIR and SOPs, NFC (#87537 )

2024-04-03 11:35:09 -07:00

DSInstructions.td

AMDGPU: Use PseudoInstr instead of Pseudo Mnemonic for SIMCInstr, NFC (#87420 )

2024-04-02 15:51:28 -07:00

EvergreenInstructions.td

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EXPInstructions.td

[AMDGPU] Simplify EXP Real instruction definitions. NFC.

2024-03-07 11:04:43 +00:00

FLATInstructions.td

[AMDGPU] Remove useless aliases for FLAT instructions. NFC. (#87462 )

2024-04-03 10:17:25 +01:00

GCNCreateVOPD.cpp

[AMDGPU] Update VOP instructions for GFX12 (#74853 )

2023-12-12 11:38:24 +01:00

GCNDPPCombine.cpp

[AMDGPU] Fix warnings about unused variables [NFC]

2024-01-25 09:35:10 +01:00

GCNHazardRecognizer.cpp

[AMDGPU] Extend MFMA padding option to gfx90a+ (#86768 )

2024-03-31 10:46:05 -07:00

GCNHazardRecognizer.h

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GCNILPSched.cpp

Add llvm::min/max_element and use it in llvm/ and mlir/ directories. (#84678 )

2024-03-10 20:00:13 -07:00

GCNIterativeScheduler.cpp

[AMDGPU] Prefer lower total register usage in regions with spilling

2024-02-26 12:19:52 -08:00

GCNIterativeScheduler.h

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GCNMinRegStrategy.cpp

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GCNNSAReassign.cpp

[AMDGPU] Do not run GCNNSAReassign pass for GFX12 (#78185 )

2024-01-17 15:22:48 +00:00

GCNPreRALongBranchReg.cpp

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GCNPreRAOptimizations.cpp

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GCNProcessors.td

[AMDGPU] Replace '.' with '-' in generic target names (#81718 )

2024-02-14 15:19:04 +01:00

GCNRegPressure.cpp

[AMDGPU] Prefer lower total register usage in regions with spilling

2024-02-26 12:19:52 -08:00

GCNRegPressure.h

[AMDGPU] Prefer lower total register usage in regions with spilling

2024-02-26 12:19:52 -08:00

GCNRewritePartialRegUses.cpp

[AMDGPU] Fix GCNRewritePartialRegUses pass: vector regclass is selected instead of scalar. (#69957 )

2023-11-16 16:56:46 +01:00

GCNSchedStrategy.cpp

[AMDGPU] Use correct VGPR threshold for flagging ExcessRP regions in unified register file case (#85860 )

2024-03-25 13:11:58 -07:00

GCNSchedStrategy.h

[AMDGPU] Fix typos. NFC

2024-01-26 12:04:58 +01:00

GCNSubtarget.h

[AMDGPU] New clang option for emitting a waitcnt instruction after each memory instruction (#79236 )

2024-04-10 10:47:04 -07:00

GCNVOPDUtils.cpp

[AMDGPU] Update VOP instructions for GFX12 (#74853 )

2023-12-12 11:38:24 +01:00

GCNVOPDUtils.h

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InstCombineTables.td

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MIMGInstructions.td

[AMDGPU] Extend zero initialization of return values for TFE (#85759 )

2024-03-25 09:01:46 +00:00

R600.h

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

R600.td

[AMDGPU][NFC] Extend PredicateControl to support True16 predicates. (#82245 )

2024-02-20 11:37:44 +00:00

R600AsmPrinter.cpp

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R600AsmPrinter.h

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R600ClauseMergePass.cpp

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R600ControlFlowFinalizer.cpp

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R600Defines.h

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R600EmitClauseMarkers.cpp

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R600ExpandSpecialInstrs.cpp

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R600FrameLowering.cpp

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R600FrameLowering.h

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R600InstrFormats.td

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R600InstrInfo.cpp

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R600InstrInfo.h

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R600InstrInfo.td

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R600Instructions.td

[AMDGPU] Generic lowering for rint and nearbyint (#69596 )

2023-11-14 18:49:21 +01:00

R600ISelDAGToDAG.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

R600ISelLowering.cpp

[Target] Use getConstantOperandVal (NFC)

2024-01-14 00:53:29 -08:00

R600ISelLowering.h

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R600MachineCFGStructurizer.cpp

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R600MachineFunctionInfo.cpp

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R600MachineFunctionInfo.h

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R600MachineScheduler.cpp

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R600MachineScheduler.h

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R600MCInstLower.cpp

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R600OpenCLImageTypeLoweringPass.cpp

[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956 )

2023-12-11 21:01:36 -08:00

R600OptimizeVectorRegisters.cpp

[AMDGPU] Use llvm::all_of (NFC)

2024-01-30 22:12:07 -08:00

R600Packetizer.cpp

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R600Processors.td

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R600RegisterInfo.cpp

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R600RegisterInfo.h

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R600RegisterInfo.td

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R600Schedule.td

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R600Subtarget.cpp

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R600Subtarget.h

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R600TargetMachine.cpp

Fix Passing TargetOptions by Value in TargetMachines for AMDGPU (#79866 )

2024-02-01 09:50:44 -08:00

R600TargetMachine.h

Fix Passing TargetOptions by Value in TargetMachines for AMDGPU (#79866 )

2024-02-01 09:50:44 -08:00

R600TargetTransformInfo.cpp

[llvm][TypeSize] Fix addition/subtraction in TypeSize. (#72979 )

2023-11-22 08:52:53 +00:00

R600TargetTransformInfo.h

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R700Instructions.td

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SIAnnotateControlFlow.cpp

[llvm] Use Instruction::hasMetadata (NFC)

2024-01-27 22:20:22 -08:00

SIDefines.h

[AMDGPU] Fix GFX11 sendmsg codes (#85299 )

2024-03-15 09:46:58 -07:00

SIFixSGPRCopies.cpp

Add llvm::min/max_element and use it in llvm/ and mlir/ directories. (#84678 )

2024-03-10 20:00:13 -07:00

SIFixVGPRCopies.cpp

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SIFoldOperands.cpp

Add non-null check before accessing pointer (#83459 )

2024-03-07 10:31:34 +05:30

SIFormMemoryClauses.cpp

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SIFrameLowering.cpp

[AMDGPU][NFC] Have helpers to deal with encoding fields. (#82772 )

2024-02-23 17:34:55 +00:00

SIFrameLowering.h

Revert "[AMDGPU] Compiler should synthesize private buffer resource descriptor from flat_scratch_init" (#81234 )

2024-02-09 09:57:38 +01:00

SIInsertHardClauses.cpp

[Codegen] Make Width in getMemOperandsWithOffsetWidth a LocationSize. (#83875 )

2024-03-06 17:40:13 +00:00

SIInsertWaitcnts.cpp

[AMDGPU] New clang option for emitting a waitcnt instruction after each memory instruction (#79236 )

2024-04-10 10:47:04 -07:00

SIInstrFormats.td

[AMDGPU] Consolidate SGPRSpill and VGPRSpill into single Spill bit (#81901 )

2024-02-16 13:32:59 -05:00

SIInstrInfo.cpp

[CodeGen] Use LocationSize for MMO getSize (#84751 )

2024-03-17 18:15:56 +00:00

SIInstrInfo.h

AMDGPU: Treat SWMMAC the same as MFMA and other WMMA for sched_barrier (#85721 )

2024-03-19 09:58:09 -07:00

SIInstrInfo.td

[AMDGPU][MC] Enables sgpr or imm src1 for float VOP3 DPP, but excludi… (#87382 )

2024-04-03 11:34:12 -04:00

SIInstructions.td

[AMDGPU] Add v2i32 to the VS_64 types. NFCI. (#88318 )

2024-04-10 14:50:54 -07:00

SIISelLowering.cpp

[AMDGPU] Use glue for convergence tokens at call-like operations (#86766 )

2024-04-01 10:51:13 +05:30

SIISelLowering.h

[AMDGPU] Extend zero initialization of return values for TFE (#85759 )

2024-03-25 09:01:46 +00:00

SILateBranchLowering.cpp

[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186 )

2023-11-06 12:30:07 +01:00

SILoadStoreOptimizer.cpp

[AMDPU] Add support for idxen and bothen buffer load/store merging in SILoadStoreOptimizer (#86285 )

2024-03-25 14:44:22 +00:00

SILowerControlFlow.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

SILowerI1Copies.cpp

AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#80003 )

2024-02-05 14:07:01 +01:00

SILowerI1Copies.h

AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#80003 )

2024-02-05 14:07:01 +01:00

SILowerSGPRSpills.cpp

[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669 )

2024-01-24 07:08:43 +05:30

SILowerWWMCopies.cpp

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SIMachineFunctionInfo.cpp

AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948 )

2024-03-21 14:24:06 +05:30

SIMachineFunctionInfo.h

[AMDGPU] Adding the amdgpu_num_work_groups function attribute (#79035 )

2024-03-12 10:30:39 -07:00

SIMachineScheduler.cpp

Add llvm::min/max_element and use it in llvm/ and mlir/ directories. (#84678 )

2024-03-10 20:00:13 -07:00

SIMachineScheduler.h

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SIMemoryLegalizer.cpp

[AMDGPU] Handle amdgpu.last.use metadata (#83816 )

2024-03-06 16:33:52 +01:00

SIModeRegister.cpp

[AMDGPU][NFC] Have helpers to deal with encoding fields. (#82772 )

2024-02-23 17:34:55 +00:00

SIModeRegisterDefaults.cpp

[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030 )

2023-12-13 13:52:40 +01:00

SIModeRegisterDefaults.h

[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030 )

2023-12-13 13:52:40 +01:00

SIOptimizeExecMasking.cpp

Reapply "Convert many LivePhysRegs uses to LiveRegUnits" (#84338 )

2024-03-08 19:05:00 +05:30

SIOptimizeExecMaskingPreRA.cpp

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SIOptimizeVGPRLiveRange.cpp

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SIPeepholeSDWA.cpp

[AMDGPU] Don't form sext/abs/neg fp8 cvt (#83843 )

2024-03-06 10:38:20 +01:00

SIPostRABundler.cpp

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SIPreAllocateWWMRegs.cpp

[CodeGen] Do not pass MF into MachineRegisterInfo methods. NFC. (#84770 )

2024-03-11 15:35:05 +00:00

SIPreEmitPeephole.cpp

[AMDGPU] Use MachineBasicBlock::instrs (NFC)

2024-01-28 10:47:07 -08:00

SIProgramInfo.cpp

[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030 )

2023-12-13 13:52:40 +01:00

SIProgramInfo.h

[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030 )

2023-12-13 13:52:40 +01:00

SIRegisterInfo.cpp

[Target] Move SubRegIdxRanges from MCSubtargetInfo to TargetInfo. (#86245 )

2024-03-22 11:15:45 -07:00

SIRegisterInfo.h

[CodeGen] Make some includes explicit (NFC)

2023-11-24 14:43:18 +01:00

SIRegisterInfo.td

[AMDGPU] Add v2i32 to the VS_64 types. NFCI. (#88318 )

2024-04-10 14:50:54 -07:00

SISchedule.td

AMDGPU: Correct cycle counts for f64 mfma on gfx940 (#83782 )

2024-03-06 09:36:01 +05:30

SIShrinkInstructions.cpp

AMDGPU/NFC: Remove some bits from TSFlags (#81525 )

2024-02-12 16:43:48 -05:00

SIWholeQuadMode.cpp

[AMDGPU] Add VDSDIR instructions for GFX12 (#75197 )

2024-01-03 16:32:00 +01:00

SMInstructions.td

AMDGPU: Simplify SMInstruction definitions, NFC (#86613 )

2024-03-25 21:53:19 -07:00

SOPInstructions.td

AMDGPU: Use PseudoInstr to name SIMCInstr for DSDIR and SOPs, NFC (#87537 )

2024-04-03 11:35:09 -07:00

VIInstrFormats.td

…

VINTERPInstructions.td

[AMDGPU] Expose RTZ version of f16 interpolation for gfx11+ (#86614 )

2024-04-01 09:48:37 +08:00

VOP1Instructions.td

AMDGPU: Copy SubtargetPredicate from pseudo to real for dpp16 and dpp8 (#84517 )

2024-03-08 10:30:01 -08:00

VOP2Instructions.td

[AMDGPU][MC] Enables sgpr or imm src1 for float VOP3 DPP, but excludi… (#87382 )

2024-04-03 11:34:12 -04:00

VOP3Instructions.td

[GlobalISel][AMDGPU] Import patterns with multiple defs (#84171 )

2024-03-08 09:39:10 +01:00

VOP3PInstructions.td

[AMDGPU] Replace isInlinableLiteral16 with specific version (#84402 )

2024-03-08 14:49:52 -05:00

VOPCInstructions.td

[AMDGPU][MC] Allow VOP3C dpp src1 to be imm or SGPR (#87418 )

2024-04-03 14:51:27 -04:00

VOPDInstructions.td

[AMDGPU] Update VOP instructions for GFX12 (#74853 )

2023-12-12 11:38:24 +01:00

VOPInstructions.td

[AMDGPU][MC] Allow VOP3C dpp src1 to be imm or SGPR (#87418 )

2024-04-03 14:51:27 -04:00