48958d02d2
1. Splitted out some parts of R600 target to separate modules/headers. 2. Reduced some include lists in headers. 3. Found and fixed issue with override `GCNTargetMachine::getSubtargetImpl()` and `R600TargetMachine::getSubtargetImpl()` had different return value type than base class. 4. Minor forward declarations cleanup. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D108596
24 lines
921 B
TableGen
24 lines
921 B
TableGen
//===-- R600InstrInfo.td - R600 DAG nodes ------------------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains DAG node definitions for the R600 target.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// R600 DAG Nodes
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//
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// Force dependencies for vector trunc stores
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def R600dummy_chain : SDNode<"AMDGPUISD::DUMMY_CHAIN", SDTNone, [SDNPHasChain]>;
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def R600ExportOp : SDTypeProfile<0, 7, [SDTCisFP<0>, SDTCisInt<1>]>;
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def R600_EXPORT: SDNode<"AMDGPUISD::R600_EXPORT", R600ExportOp,
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[SDNPHasChain, SDNPSideEffect]>;
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