David Green 4ac2721e51 [AArch64] Add costs for ST3 and ST4 instructions, modelled as store(shuffle). (#87934) ...

This tries to add some costs for the shuffle in a ST3/ST4 instruction,
which are represented in LLVM IR as store(interleaving shuffle). In
order to detect the store, it needs to add a CxtI context instruction to
check the users of the shuffle. LD3 and LD4 are added, LD2 should be a
zip1 shuffle, which will be added in another patch.

It should help fix some of the regressions from #87510.

2024-04-09 16:36:08 +01:00

..

AsmParser

[MC] Make MCParsedAsmOperand::getReg() return MCRegister (#86444)

2024-03-25 05:13:48 +03:00

Disassembler

[Hexagon] Flip subreg bit for reverse pairs hvx .new (#75873)

2024-01-18 15:04:32 -06:00

MCTargetDesc

[Hexagon] ELF attributes for Hexagon (#85359)

2024-03-19 16:22:30 -05:00

TargetInfo

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BitTracker.cpp

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BitTracker.h

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CMakeLists.txt

[Hexagon] Add Loop Alignment pass. (#83379)

2024-02-29 16:57:33 -06:00

Hexagon.h

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Hexagon.td

…

HexagonAsmPrinter.cpp

[Hexagon] ELF attributes for Hexagon (#85359)

2024-03-19 16:22:30 -05:00

HexagonAsmPrinter.h

[Hexagon] ELF attributes for Hexagon (#85359)

2024-03-19 16:22:30 -05:00

HexagonBitSimplify.cpp

[Hexagon] Use the correct call to detect debug instructions (#83373)

2024-02-29 09:51:52 -06:00

HexagonBitTracker.cpp

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HexagonBitTracker.h

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HexagonBlockRanges.cpp

[MC] Use subregs/superregs instead of MCSubRegIterator/MCSuperRegIterator. NFC.

2023-04-18 13:29:41 +01:00

HexagonBlockRanges.h

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HexagonBranchRelaxation.cpp

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HexagonCallingConv.td

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HexagonCFGOptimizer.cpp

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HexagonCommonGEP.cpp

[NFC][RemoveDIs] Use iterators for insertion at various call-sites (#84736)

2024-03-19 16:36:29 +00:00

HexagonConstExtenders.cpp

Add llvm::min/max_element and use it in llvm/ and mlir/ directories. (#84678)

2024-03-10 20:00:13 -07:00

HexagonConstPropagation.cpp

[Target] Use range-based for loops (NFC)

2023-12-24 23:09:55 -08:00

HexagonCopyToCombine.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

HexagonDepArch.h

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HexagonDepArch.td

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HexagonDepDecoders.inc

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HexagonDepIICHVX.td

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HexagonDepIICScalar.td

Hexagon: Add memw_phys, l2gclean* instructions (#72420)

2023-11-16 13:48:20 -06:00

HexagonDepInstrFormats.td

Hexagon: Add memw_phys, l2gclean* instructions (#72420)

2023-11-16 13:48:20 -06:00

HexagonDepInstrInfo.td

Hexagon: Add memw_phys, l2gclean* instructions (#72420)

2023-11-16 13:48:20 -06:00

HexagonDepInstrIntrinsics.inc

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HexagonDepITypes.h

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HexagonDepITypes.td

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HexagonDepMapAsm2Intrin.td

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HexagonDepMappings.td

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HexagonDepMask.h

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HexagonDepOperands.td

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HexagonDepTimingClasses.h

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HexagonEarlyIfConv.cpp

[Hexagon] Use llvm::children (NFC)

2024-01-20 18:57:31 -08:00

HexagonExpandCondsets.cpp

[CodeGen] Make some includes explicit (NFC)

2023-11-24 14:43:18 +01:00

HexagonFixupHwLoops.cpp

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HexagonFrameLowering.cpp

Revert rG58de1e2c5eee548a9b365e3b1554d87317072ad9 "Fix stack layout for frames larger than 2gb (#84114)"

2024-03-27 16:16:15 +00:00

HexagonFrameLowering.h

[Hexagon] Order objects on the stack by their alignments (#81280)

2024-02-10 14:42:50 -06:00

HexagonGenExtract.cpp

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HexagonGenInsert.cpp

Add llvm::min/max_element and use it in llvm/ and mlir/ directories. (#84678)

2024-03-10 20:00:13 -07:00

HexagonGenMemAbsolute.cpp

[Hexagon] Generate absolute-set load/store instructions. (#82034)

2024-02-21 19:50:29 -06:00

HexagonGenMux.cpp

Reapply "Convert many LivePhysRegs uses to LiveRegUnits" (#84338)

2024-03-08 19:05:00 +05:30

HexagonGenPredicate.cpp

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HexagonHardwareLoops.cpp

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HexagonHazardRecognizer.cpp

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HexagonHazardRecognizer.h

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HexagonIICHVX.td

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HexagonIICScalar.td

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HexagonInstrFormats.td

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HexagonInstrFormatsV60.td

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HexagonInstrFormatsV65.td

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HexagonInstrInfo.cpp

[Codegen] Make Width in getMemOperandsWithOffsetWidth a LocationSize. (#83875)

2024-03-06 17:40:13 +00:00

HexagonInstrInfo.h

[Codegen] Make Width in getMemOperandsWithOffsetWidth a LocationSize. (#83875)

2024-03-06 17:40:13 +00:00

HexagonIntrinsics.td

[Hexagon] Fix HVX predicates on some intrinsic selection patterns

2023-05-16 10:05:59 -07:00

HexagonIntrinsicsV5.td

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HexagonIntrinsicsV60.td

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HexagonISelDAGToDAG.cpp

[HEXAGON] Inlining Division (#79021)

2024-01-24 09:30:33 -06:00

HexagonISelDAGToDAG.h

[HEXAGON] Inlining Division (#79021)

2024-01-24 09:30:33 -06:00

HexagonISelDAGToDAGHVX.cpp

[Target] Use getConstantOperandVal (NFC)

2024-01-14 00:53:29 -08:00

HexagonISelLowering.cpp

[NFC] Remove unused parameter from shouldAssumeDSOLocal()

2024-03-11 19:48:17 +00:00

HexagonISelLowering.h

[llvm] Move CodeGenTypes library to its own directory (#79444)

2024-01-25 12:01:31 -05:00

HexagonISelLoweringHVX.cpp

[RFC][SelectionDAG] Add and use SDNode::getAsZExtVal() helper (#76710)

2024-01-09 12:25:17 +00:00

HexagonLoopAlign.cpp

[Hexagon] Add Loop Alignment pass. (#83379)

2024-02-29 16:57:33 -06:00

HexagonLoopIdiomRecognition.cpp

[LLVM][IR] Replace ConstantInt's specialisation of getType() with getIntegerType(). (#75217)

2023-12-18 11:58:42 +00:00

HexagonLoopIdiomRecognition.h

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HexagonMachineFunctionInfo.cpp

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HexagonMachineFunctionInfo.h

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HexagonMachineScheduler.cpp

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HexagonMachineScheduler.h

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HexagonMapAsm2IntrinV62.gen.td

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HexagonMCInstLower.cpp

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HexagonNewValueJump.cpp

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HexagonOperands.td

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HexagonOptAddrMode.cpp

[HEXAGON] Add basic block limit for RDF optimizations (#81071)

2024-02-08 21:45:15 -06:00

HexagonOptimizeSZextends.cpp

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HexagonPassRegistry.def

[NewPM][Hexagon] Add HexagonPassRegistry.def (#86244)

2024-03-23 15:02:27 +08:00

HexagonPatterns.td

[Hexagon] Fix zero extension of bit predicates with vtrunehb (#81772)

2024-02-14 13:10:18 -06:00

HexagonPatternsHVX.td

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HexagonPatternsV65.td

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HexagonPeephole.cpp

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HexagonPseudo.td

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HexagonRDFOpt.cpp

[HEXAGON] Add basic block limit for RDF optimizations (#81071)

2024-02-08 21:45:15 -06:00

HexagonRegisterInfo.cpp

[Hexagon] Remove getFirstCallerSavedNonParamReg

2023-05-16 18:58:45 -07:00

HexagonRegisterInfo.h

[Hexagon] Remove getFirstCallerSavedNonParamReg

2023-05-16 18:58:45 -07:00

HexagonRegisterInfo.td

[Hexagon] Explicitly make vector subregs have unknown size and offset

2023-05-28 08:32:43 -07:00

HexagonSchedule.td

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HexagonScheduleV5.td

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HexagonScheduleV55.td

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HexagonScheduleV60.td

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HexagonScheduleV62.td

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HexagonScheduleV65.td

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HexagonScheduleV66.td

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HexagonScheduleV67.td

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HexagonScheduleV67T.td

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HexagonScheduleV68.td

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HexagonScheduleV69.td

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HexagonScheduleV71.td

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HexagonScheduleV71T.td

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HexagonScheduleV73.td

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HexagonSelectionDAGInfo.cpp

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HexagonSelectionDAGInfo.h

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HexagonSplitConst32AndConst64.cpp

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HexagonSplitDouble.cpp

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HexagonStoreWidening.cpp

[CodeGen] Use LocationSize for MMO getSize (#84751)

2024-03-17 18:15:56 +00:00

HexagonSubtarget.cpp

[Codegen] Make Width in getMemOperandsWithOffsetWidth a LocationSize. (#83875)

2024-03-06 17:40:13 +00:00

HexagonSubtarget.h

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

HexagonTargetMachine.cpp

[NewPM][Hexagon] Add HexagonPassRegistry.def (#86244)

2024-03-23 15:02:27 +08:00

HexagonTargetMachine.h

[Hexagon] Add Loop Alignment pass. (#83379)

2024-02-29 16:57:33 -06:00

HexagonTargetObjectFile.cpp

[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)

2023-12-11 21:01:36 -08:00

HexagonTargetObjectFile.h

…

HexagonTargetStreamer.h

[Hexagon] ELF attributes for Hexagon (#85359)

2024-03-19 16:22:30 -05:00

HexagonTargetTransformInfo.cpp

[AArch64] Add costs for ST3 and ST4 instructions, modelled as store(shuffle). (#87934)

2024-04-09 16:36:08 +01:00

HexagonTargetTransformInfo.h

[AArch64] Add costs for ST3 and ST4 instructions, modelled as store(shuffle). (#87934)

2024-04-09 16:36:08 +01:00

HexagonTfrCleanup.cpp

[Hexagon] Clean up redundant transfer instructions. (#82663)

2024-02-22 17:31:37 -06:00

HexagonVectorCombine.cpp

Add llvm::min/max_element and use it in llvm/ and mlir/ directories. (#84678)

2024-03-10 20:00:13 -07:00

HexagonVectorLoopCarriedReuse.cpp

[NFC][RemoveDIs] Use iterators over inst-pointers when using IRBuilder

2023-09-11 20:01:19 +01:00

HexagonVectorLoopCarriedReuse.h

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HexagonVectorPrint.cpp

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HexagonVExtract.cpp

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HexagonVLIWPacketizer.cpp

[Hexagon] Use the correct call to detect debug instructions (#83373)

2024-02-29 09:51:52 -06:00

HexagonVLIWPacketizer.h

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RDFCopy.cpp

[Hexagon] Do not track reserved regs in RDF optimizations

2023-06-15 09:01:04 -07:00

RDFCopy.h

[RDF] Allow RegisterRef to contain register unit

2023-06-12 13:51:31 -07:00

RDFDeadCode.cpp

[Hexagon] Do not track reserved regs in RDF optimizations

2023-06-15 09:01:04 -07:00

RDFDeadCode.h

[Hexagon] Do not track reserved regs in RDF optimizations

2023-06-15 09:01:04 -07:00