bbbe8ecc17
We previously had a heuristic that if a value V was used multiple times
in a single PHI, then to avoid potentially rematerializing into many predecessors
we bail out. The phi uses only counted as a single use in the shouldLocalize() hook
because it counted the PHI as a single instruction use, not factoring in it may
have many incoming edges.
It turns out this heuristic is slightly too pessimistic, and allowing a small number
of these uses to be localized can improve code size due to shortening live ranges,
especially if those ranges span a call.
This change results in some improvements in size on CTMark -Os:
```
Program size.__text
before after diff
kimwitu++/kc 451676.00 451860.00 0.0%
mafft/pairlocalalign 241460.00 241540.00 0.0%
tramp3d-v4/tramp3d-v4 389216.00 389208.00 -0.0%
7zip/7zip-benchmark 587528.00 587464.00 -0.0%
Bullet/bullet 457424.00 457348.00 -0.0%
consumer-typeset/consumer-typeset 405472.00 405376.00 -0.0%
SPASS/SPASS 410288.00 410120.00 -0.0%
lencod/lencod 426396.00 426108.00 -0.1%
ClamAV/clamscan 380108.00 379756.00 -0.1%
sqlite3/sqlite3 283664.00 283372.00 -0.1%
Geomean difference -0.0%
```
I experimented with different variations and thresholds. Using 3 instead
of 2 resulted in a further 0.1% improvement on ClamAV but also regressed
sqlite3 by the same %.
267 lines
9.6 KiB
LLVM
267 lines
9.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s
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; Test the localizer did something and we don't materialize all
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; constants in SGPRs in the entry block.
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define amdgpu_kernel void @localize_constants(i1 %cond) {
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; GFX9-LABEL: localize_constants:
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; GFX9: ; %bb.0: ; %entry
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; GFX9-NEXT: s_load_dword s1, s[4:5], 0x0
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; GFX9-NEXT: s_mov_b32 s0, 1
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; GFX9-NEXT: s_waitcnt lgkmcnt(0)
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; GFX9-NEXT: s_xor_b32 s1, s1, 1
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; GFX9-NEXT: s_and_b32 s1, s1, 1
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; GFX9-NEXT: s_cmp_lg_u32 s1, 0
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; GFX9-NEXT: s_cbranch_scc0 .LBB0_2
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; GFX9-NEXT: ; %bb.1: ; %bb1
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; GFX9-NEXT: v_mov_b32_e32 v0, 0x5be6
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; GFX9-NEXT: global_store_dword v[0:1], v0, off
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_mov_b32_e32 v0, 0x1c7
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; GFX9-NEXT: global_store_dword v[0:1], v0, off
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_mov_b32_e32 v0, 0x3e8
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; GFX9-NEXT: global_store_dword v[0:1], v0, off
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_mov_b32_e32 v0, 0x1c8
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; GFX9-NEXT: global_store_dword v[0:1], v0, off
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_mov_b32_e32 v0, 0x3e7
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; GFX9-NEXT: global_store_dword v[0:1], v0, off
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_mov_b32_e32 v0, 0x7b
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; GFX9-NEXT: global_store_dword v[0:1], v0, off
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: s_mov_b32 s0, 0
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; GFX9-NEXT: .LBB0_2: ; %Flow
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; GFX9-NEXT: s_xor_b32 s0, s0, 1
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; GFX9-NEXT: s_and_b32 s0, s0, 1
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; GFX9-NEXT: s_cmp_lg_u32 s0, 0
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; GFX9-NEXT: s_cbranch_scc1 .LBB0_4
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; GFX9-NEXT: ; %bb.3: ; %bb0
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; GFX9-NEXT: v_mov_b32_e32 v0, 0x7b
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; GFX9-NEXT: global_store_dword v[0:1], v0, off
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_mov_b32_e32 v0, 0x1c8
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; GFX9-NEXT: global_store_dword v[0:1], v0, off
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_mov_b32_e32 v0, 0x3e7
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; GFX9-NEXT: global_store_dword v[0:1], v0, off
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_mov_b32_e32 v0, 0x3e8
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; GFX9-NEXT: global_store_dword v[0:1], v0, off
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_mov_b32_e32 v0, 0x1c7
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; GFX9-NEXT: global_store_dword v[0:1], v0, off
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_mov_b32_e32 v0, 0x5be6
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; GFX9-NEXT: global_store_dword v[0:1], v0, off
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: .LBB0_4: ; %bb2
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; GFX9-NEXT: s_endpgm
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entry:
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br i1 %cond, label %bb0, label %bb1
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bb0:
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store volatile i32 123, ptr addrspace(1) undef
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store volatile i32 456, ptr addrspace(1) undef
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store volatile i32 999, ptr addrspace(1) undef
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store volatile i32 1000, ptr addrspace(1) undef
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store volatile i32 455, ptr addrspace(1) undef
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store volatile i32 23526, ptr addrspace(1) undef
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br label %bb2
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bb1:
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store volatile i32 23526, ptr addrspace(1) undef
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store volatile i32 455, ptr addrspace(1) undef
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store volatile i32 1000, ptr addrspace(1) undef
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store volatile i32 456, ptr addrspace(1) undef
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store volatile i32 999, ptr addrspace(1) undef
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store volatile i32 123, ptr addrspace(1) undef
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br label %bb2
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bb2:
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ret void
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}
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; FIXME: These aren't localized because thesee were legalized before
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; the localizer, and are no longer G_GLOBAL_VALUE.
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@gv0 = addrspace(1) global i32 undef, align 4
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@gv1 = addrspace(1) global i32 undef, align 4
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@gv2 = addrspace(1) global i32 undef, align 4
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@gv3 = addrspace(1) global i32 undef, align 4
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define amdgpu_kernel void @localize_globals(i1 %cond) {
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; GFX9-LABEL: localize_globals:
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; GFX9: ; %bb.0: ; %entry
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; GFX9-NEXT: s_load_dword s1, s[4:5], 0x0
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; GFX9-NEXT: s_mov_b32 s0, 1
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; GFX9-NEXT: s_waitcnt lgkmcnt(0)
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; GFX9-NEXT: s_xor_b32 s1, s1, 1
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; GFX9-NEXT: s_and_b32 s1, s1, 1
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; GFX9-NEXT: s_cmp_lg_u32 s1, 0
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; GFX9-NEXT: s_cbranch_scc0 .LBB1_2
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; GFX9-NEXT: ; %bb.1: ; %bb1
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; GFX9-NEXT: s_getpc_b64 s[0:1]
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; GFX9-NEXT: s_add_u32 s0, s0, gv2@gotpcrel32@lo+4
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; GFX9-NEXT: s_addc_u32 s1, s1, gv2@gotpcrel32@hi+12
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; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x0
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; GFX9-NEXT: s_getpc_b64 s[0:1]
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; GFX9-NEXT: s_add_u32 s0, s0, gv3@gotpcrel32@lo+4
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; GFX9-NEXT: s_addc_u32 s1, s1, gv3@gotpcrel32@hi+12
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; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0
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; GFX9-NEXT: v_mov_b32_e32 v0, 0
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; GFX9-NEXT: v_mov_b32_e32 v1, 1
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; GFX9-NEXT: s_mov_b32 s0, 0
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; GFX9-NEXT: s_waitcnt lgkmcnt(0)
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; GFX9-NEXT: global_store_dword v0, v0, s[2:3]
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: global_store_dword v0, v1, s[4:5]
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: .LBB1_2: ; %Flow
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; GFX9-NEXT: s_xor_b32 s0, s0, 1
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; GFX9-NEXT: s_and_b32 s0, s0, 1
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; GFX9-NEXT: s_cmp_lg_u32 s0, 0
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; GFX9-NEXT: s_cbranch_scc1 .LBB1_4
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; GFX9-NEXT: ; %bb.3: ; %bb0
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; GFX9-NEXT: s_getpc_b64 s[0:1]
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; GFX9-NEXT: s_add_u32 s0, s0, gv0@gotpcrel32@lo+4
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; GFX9-NEXT: s_addc_u32 s1, s1, gv0@gotpcrel32@hi+12
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; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
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; GFX9-NEXT: s_getpc_b64 s[2:3]
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; GFX9-NEXT: s_add_u32 s2, s2, gv1@gotpcrel32@lo+4
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; GFX9-NEXT: s_addc_u32 s3, s3, gv1@gotpcrel32@hi+12
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; GFX9-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
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; GFX9-NEXT: v_mov_b32_e32 v0, 0
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; GFX9-NEXT: v_mov_b32_e32 v1, 1
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; GFX9-NEXT: s_waitcnt lgkmcnt(0)
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; GFX9-NEXT: global_store_dword v0, v0, s[0:1]
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: global_store_dword v0, v1, s[2:3]
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: .LBB1_4: ; %bb2
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; GFX9-NEXT: s_endpgm
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entry:
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br i1 %cond, label %bb0, label %bb1
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bb0:
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store volatile i32 0, ptr addrspace(1) @gv0
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store volatile i32 1, ptr addrspace(1) @gv1
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br label %bb2
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bb1:
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store volatile i32 0, ptr addrspace(1) @gv2
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store volatile i32 1, ptr addrspace(1) @gv3
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br label %bb2
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bb2:
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ret void
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}
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@static.gv0 = internal addrspace(1) global i32 undef, align 4
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@static.gv1 = internal addrspace(1) global i32 undef, align 4
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@static.gv2 = internal addrspace(1) global i32 undef, align 4
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@static.gv3 = internal addrspace(1) global i32 undef, align 4
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define void @localize_internal_globals(i1 %cond) {
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; GFX9-LABEL: localize_internal_globals:
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; GFX9: ; %bb.0: ; %entry
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: v_and_b32_e32 v0, 1, v0
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; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
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; GFX9-NEXT: s_xor_b64 s[4:5], vcc, -1
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; GFX9-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
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; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[6:7]
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; GFX9-NEXT: s_cbranch_execnz .LBB2_3
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; GFX9-NEXT: ; %bb.1: ; %Flow
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; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
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; GFX9-NEXT: s_cbranch_execnz .LBB2_4
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; GFX9-NEXT: .LBB2_2: ; %bb2
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; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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; GFX9-NEXT: .LBB2_3: ; %bb1
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; GFX9-NEXT: s_getpc_b64 s[6:7]
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; GFX9-NEXT: s_add_u32 s6, s6, static.gv2@rel32@lo+4
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; GFX9-NEXT: s_addc_u32 s7, s7, static.gv2@rel32@hi+12
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; GFX9-NEXT: v_mov_b32_e32 v0, 0
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; GFX9-NEXT: global_store_dword v0, v0, s[6:7]
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: s_getpc_b64 s[6:7]
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; GFX9-NEXT: s_add_u32 s6, s6, static.gv3@rel32@lo+4
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; GFX9-NEXT: s_addc_u32 s7, s7, static.gv3@rel32@hi+12
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; GFX9-NEXT: v_mov_b32_e32 v1, 1
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; GFX9-NEXT: global_store_dword v0, v1, s[6:7]
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
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; GFX9-NEXT: s_cbranch_execz .LBB2_2
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; GFX9-NEXT: .LBB2_4: ; %bb0
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; GFX9-NEXT: s_getpc_b64 s[6:7]
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; GFX9-NEXT: s_add_u32 s6, s6, static.gv0@rel32@lo+4
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; GFX9-NEXT: s_addc_u32 s7, s7, static.gv0@rel32@hi+12
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; GFX9-NEXT: v_mov_b32_e32 v0, 0
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; GFX9-NEXT: global_store_dword v0, v0, s[6:7]
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: s_getpc_b64 s[6:7]
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; GFX9-NEXT: s_add_u32 s6, s6, static.gv1@rel32@lo+4
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; GFX9-NEXT: s_addc_u32 s7, s7, static.gv1@rel32@hi+12
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; GFX9-NEXT: v_mov_b32_e32 v1, 1
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; GFX9-NEXT: global_store_dword v0, v1, s[6:7]
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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entry:
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br i1 %cond, label %bb0, label %bb1
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bb0:
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store volatile i32 0, ptr addrspace(1) @static.gv0
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store volatile i32 1, ptr addrspace(1) @static.gv1
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br label %bb2
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bb1:
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store volatile i32 0, ptr addrspace(1) @static.gv2
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store volatile i32 1, ptr addrspace(1) @static.gv3
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br label %bb2
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bb2:
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ret void
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}
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; This would crash from using the wrong insert point
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define void @sink_null_insert_pt(ptr addrspace(4) %arg0) {
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; GFX9-LABEL: sink_null_insert_pt:
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; GFX9: ; %bb.0: ; %entry
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: s_mov_b32 s16, s33
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; GFX9-NEXT: s_mov_b32 s33, s32
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; GFX9-NEXT: s_or_saveexec_b64 s[18:19], -1
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; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
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; GFX9-NEXT: s_mov_b64 exec, s[18:19]
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; GFX9-NEXT: v_mov_b32_e32 v0, 0
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; GFX9-NEXT: v_mov_b32_e32 v1, 0
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; GFX9-NEXT: global_load_dword v0, v[0:1], off glc
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_writelane_b32 v40, s16, 2
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; GFX9-NEXT: v_writelane_b32 v40, s30, 0
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; GFX9-NEXT: s_addk_i32 s32, 0x400
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; GFX9-NEXT: v_writelane_b32 v40, s31, 1
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; GFX9-NEXT: s_swappc_b64 s[30:31], 0
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; GFX9-NEXT: v_readlane_b32 s31, v40, 1
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; GFX9-NEXT: v_readlane_b32 s30, v40, 0
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; GFX9-NEXT: v_readlane_b32 s4, v40, 2
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; GFX9-NEXT: s_or_saveexec_b64 s[6:7], -1
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; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
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; GFX9-NEXT: s_mov_b64 exec, s[6:7]
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; GFX9-NEXT: s_addk_i32 s32, 0xfc00
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; GFX9-NEXT: s_mov_b32 s33, s4
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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entry:
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%load0 = load volatile i32, ptr addrspace(1) null, align 4
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br label %bb1
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bb1:
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call void null()
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ret void
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}
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