9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
71 lines
2.1 KiB
YAML
71 lines
2.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
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# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
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---
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name: bitreverse_i32_s
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: bitreverse_i32_s
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; CHECK: liveins: $sgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK-NEXT: [[BITREVERSE:%[0-9]+]]:sgpr(s32) = G_BITREVERSE [[COPY]]
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = G_BITREVERSE %0
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...
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---
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name: bitreverse_i32_v
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: bitreverse_i32_v
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK-NEXT: [[BITREVERSE:%[0-9]+]]:vgpr(s32) = G_BITREVERSE [[COPY]]
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = G_BITREVERSE %0
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...
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---
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name: bitreverse_i64_s
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: bitreverse_i64_s
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; CHECK: liveins: $sgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
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; CHECK-NEXT: [[BITREVERSE:%[0-9]+]]:sgpr(s64) = G_BITREVERSE [[COPY]]
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%0:_(s64) = COPY $sgpr0_sgpr1
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%1:_(s64) = G_BITREVERSE %0
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...
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---
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name: bitreverse_i64_v
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: bitreverse_i64_v
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
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; CHECK-NEXT: [[BITREVERSE:%[0-9]+]]:vgpr(s32) = G_BITREVERSE [[UV1]]
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; CHECK-NEXT: [[BITREVERSE1:%[0-9]+]]:vgpr(s32) = G_BITREVERSE [[UV]]
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; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[BITREVERSE]](s32), [[BITREVERSE1]](s32)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s64) = G_BITREVERSE %0
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...
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