9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
88 lines
2.7 KiB
LLVM
88 lines
2.7 KiB
LLVM
; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
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; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}fmul_f32:
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; GCN: v_mul_f32
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; R600: MUL_IEEE {{\** *}}{{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W
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define amdgpu_kernel void @fmul_f32(ptr addrspace(1) %out, float %a, float %b) {
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entry:
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%0 = fmul float %a, %b
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store float %0, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fmul_v2f32:
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; GCN: v_mul_f32
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; GCN: v_mul_f32
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; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
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; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
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define amdgpu_kernel void @fmul_v2f32(ptr addrspace(1) %out, <2 x float> %a, <2 x float> %b) {
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entry:
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%0 = fmul <2 x float> %a, %b
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store <2 x float> %0, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fmul_v4f32:
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; GCN: v_mul_f32
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; GCN: v_mul_f32
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; GCN: v_mul_f32
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; GCN: v_mul_f32
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; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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define amdgpu_kernel void @fmul_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %in) {
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%b_ptr = getelementptr <4 x float>, ptr addrspace(1) %in, i32 1
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%a = load <4 x float>, ptr addrspace(1) %in
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%b = load <4 x float>, ptr addrspace(1) %b_ptr
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%result = fmul <4 x float> %a, %b
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store <4 x float> %result, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}test_mul_2_k:
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; GCN: v_mul_f32
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; GCN-NOT: v_mul_f32
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; GCN: s_endpgm
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define amdgpu_kernel void @test_mul_2_k(ptr addrspace(1) %out, float %x) #0 {
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%y = fmul float %x, 2.0
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%z = fmul float %y, 3.0
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store float %z, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}test_mul_2_k_inv:
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; GCN: v_mul_f32
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; GCN-NOT: v_mul_f32
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; GCN-NOT: v_mad_f32
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; GCN: s_endpgm
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define amdgpu_kernel void @test_mul_2_k_inv(ptr addrspace(1) %out, float %x) #0 {
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%y = fmul float %x, 3.0
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%z = fmul float %y, 2.0
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store float %z, ptr addrspace(1) %out
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ret void
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}
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; There should be three multiplies here; %a should be used twice (once
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; negated), not duplicated into mul x, 5.0 and mul x, -5.0.
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; FUNC-LABEL: {{^}}test_mul_twouse:
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; GCN: v_mul_f32
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; GCN: v_mul_f32
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; GCN: v_mul_f32
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; GCN-NOT: v_mul_f32
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define amdgpu_kernel void @test_mul_twouse(ptr addrspace(1) %out, float %x, float %y) #0 {
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%a = fmul float %x, 5.0
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%b = fsub float -0.0, %a
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%c = fmul float %b, %y
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%d = fmul float %c, %a
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store float %d, ptr addrspace(1) %out
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ret void
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}
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attributes #0 = { nounwind }
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