11fcae69db
Summary: This patch adds a new intrinsic and builtin function mirroring the existing `__builtin_readcyclecounter`. The difference is that this implementation targets a separate counter that some targets have which returns a fixed frequency clock that can be used to determine elapsed time, this is different compared to the cycle counter which often has variable frequency. This patch only adds support for the NVPTX and AMDGPU targets. This is done as a new and separate builtin rather than an argument to `readcyclecounter` to avoid needing to change existing code and to make the separation more explicit.
25 lines
1.3 KiB
LLVM
25 lines
1.3 KiB
LLVM
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX700
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; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX900
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; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX900
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; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX1100
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; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX1100
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declare i64 @llvm.readsteadycounter() #0
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; GCN-LABEL: {{^}}test_readsteadycounter:
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; GFX700: s_mov_b32 s[[REG:[0-9]+]], 0
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; GFX900: s_memrealtime s[[[LO:[0-9]+]]:[[HI:[0-9]+]]]
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; GFX900: s_memrealtime s[[[LO:[0-9]+]]:[[HI:[0-9]+]]]
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; GFX1100: s_sendmsg_rtn_b64 s[[[LO:[0-9]+]]:[[HI:[0-9]+]]], sendmsg(MSG_RTN_GET_REALTIME)
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; GFX1100: s_sendmsg_rtn_b64 s[[[LO:[0-9]+]]:[[HI:[0-9]+]]], sendmsg(MSG_RTN_GET_REALTIME)
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define amdgpu_kernel void @test_readsteadycounter(ptr addrspace(1) %out) #0 {
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%cycle0 = call i64 @llvm.readsteadycounter()
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store volatile i64 %cycle0, ptr addrspace(1) %out
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%cycle1 = call i64 @llvm.readsteadycounter()
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store volatile i64 %cycle1, ptr addrspace(1) %out
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ret void
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}
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attributes #0 = { nounwind }
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