9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
52 lines
2.7 KiB
YAML
52 lines
2.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs -run-pass=gcn-create-vopd,amdgpu-insert-delay-alu %s -o - | FileCheck %s
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---
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name: vopd_fmac_fmac
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: vopd_fmac_fmac
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; CHECK: $vgpr0 = IMPLICIT_DEF
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; CHECK-NEXT: $vgpr1 = IMPLICIT_DEF
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; CHECK-NEXT: $vgpr2 = IMPLICIT_DEF
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; CHECK-NEXT: $vgpr3 = IMPLICIT_DEF
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; CHECK-NEXT: $vgpr4 = IMPLICIT_DEF
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; CHECK-NEXT: $vgpr0, $vgpr1 = V_DUAL_FMAC_F32_e32_X_FMAC_F32_e32_gfx11 $vgpr2, $vgpr3, $vgpr0, $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
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; CHECK-NEXT: S_DELAY_ALU 1
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; CHECK-NEXT: $vgpr0, $vgpr1 = V_DUAL_FMAC_F32_e32_X_FMAC_F32_e32_gfx11 $vgpr2, $vgpr3, $vgpr0, $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = IMPLICIT_DEF
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$vgpr2 = IMPLICIT_DEF
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$vgpr3 = IMPLICIT_DEF
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$vgpr4 = IMPLICIT_DEF
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$vgpr0 = V_FMAC_F32_e32 $vgpr2, $vgpr3, $vgpr0, implicit $mode, implicit $exec
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$vgpr1 = V_FMAC_F32_e32 $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec
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$vgpr0 = V_FMAC_F32_e32 $vgpr2, $vgpr3, $vgpr0, implicit $mode, implicit $exec
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$vgpr1 = V_FMAC_F32_e32 $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec
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...
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---
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name: vopd_dot2c_dot2c
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: vopd_dot2c_dot2c
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; CHECK: $vgpr0 = IMPLICIT_DEF
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; CHECK-NEXT: $vgpr1 = IMPLICIT_DEF
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; CHECK-NEXT: $vgpr2 = IMPLICIT_DEF
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; CHECK-NEXT: $vgpr3 = IMPLICIT_DEF
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; CHECK-NEXT: $vgpr4 = IMPLICIT_DEF
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; CHECK-NEXT: $vgpr0, $vgpr1 = V_DUAL_DOT2C_F32_F16_e32_X_DOT2C_F32_F16_e32_gfx11 $vgpr2, $vgpr3, $vgpr0, $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
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; CHECK-NEXT: S_DELAY_ALU 1
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; CHECK-NEXT: $vgpr0, $vgpr1 = V_DUAL_DOT2C_F32_F16_e32_X_DOT2C_F32_F16_e32_gfx11 $vgpr2, $vgpr3, $vgpr0, $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = IMPLICIT_DEF
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$vgpr2 = IMPLICIT_DEF
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$vgpr3 = IMPLICIT_DEF
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$vgpr4 = IMPLICIT_DEF
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$vgpr0 = V_DOT2C_F32_F16_e32 $vgpr2, $vgpr3, $vgpr0, implicit $mode, implicit $exec
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$vgpr1 = V_DOT2C_F32_F16_e32 $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec
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$vgpr0 = V_DOT2C_F32_F16_e32 $vgpr2, $vgpr3, $vgpr0, implicit $mode, implicit $exec
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$vgpr1 = V_DOT2C_F32_F16_e32 $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec
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...
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