yingopq e13e95bc44 [Mips] Optimize (shift x (and y, BitWidth - 1)) to (shift x, y) (#73889) ...

Do optimization to turn x >> (shift & 31/63) into a single srlv instead
of andi + srlv, since the mips variable shift instruction already
implicitly masks the shift, like x86, wasm and AMDGPU. Copy the
X86DAGToDAGISel::isUnneededShiftMask() function to MIPS for checking
whether need combine two instructions to one.

2023-12-29 14:53:55 +05:30

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