Files
clang-p2996/llvm/test/CodeGen/X86/fastregalloc-selfloop.mir
Luo, Yuanke 44e8a205f4 [fastregalloc] Enhance the heuristics for liveout in self loop.
For below case, virtual register is defined twice in the self loop. We
don't need to spill %0 after the third instruction `%0 = def (tied %0)`,
because it is defined in the second instruction `%0 = def`.

1 bb.1
2 %0 = def
3 %0 = def (tied %0)
4 ...
5 jmp bb.1

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D125079
2022-06-21 09:18:49 +08:00

32 lines
860 B
YAML

# RUN: llc -mtriple=x86_64-- -run-pass=regallocfast -o - %s | FileCheck %s
...
---
name: foo
alignment: 16
tracksRegLiveness: true
registers:
- { id: 0, class: vr128 }
frameInfo:
maxAlignment: 16
stack:
- { id: 0, size: 64, alignment: 16 }
machineFunctionInfo: {}
body: |
bb.0.entry:
; CHECK: renamable $xmm1 = V_SET0
; CHECK-NEXT: renamable $xmm0 = V_SET0
; CHECK-NEXT: renamable $xmm1 = PXORrr renamable $xmm1, renamable $xmm0
; CHECK-NEXT: MOVAPSmr %stack.0, 1, $noreg, 0, $noreg, killed renamable $xmm1
; CHECK-NEXT: MOVAPSmr %stack.0, 1, $noreg, 16, $noreg, killed renamable $xmm0
%0:vr128 = V_SET0
%1:vr128 = V_SET0
%0:vr128 = PXORrr %0, %1
MOVAPSmr %stack.0, 1, $noreg, 0, $noreg, %0
MOVAPSmr %stack.0, 1, $noreg, 16, $noreg, %1
JMP_1 %bb.0.entry
RET 0
...