dce77a3579
We are replacing a narrow IV increment with a wider one. If the original (narrow) increment did not wrap, the wider one should not wrap either. Set the flags to be the union of both wide increment and original increment; this ensures we preserve flags SCEV could infer for the wider increment. Fixes https://github.com/llvm/llvm-project/issues/71517.
65 lines
2.5 KiB
LLVM
65 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes='default<O3>' -enable-loop-flatten -loop-flatten-cost-threshold=3 -S %s | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64"
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define dso_local void @_Z3fooPiii(ptr %A, i32 %N, i32 %M) #0 {
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; CHECK-LABEL: @_Z3fooPiii(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP3:%.*]] = icmp sgt i32 [[N:%.*]], 0
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; CHECK-NEXT: [[CMP21:%.*]] = icmp sgt i32 [[M:%.*]], 0
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; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[CMP3]], i1 [[CMP21]], i1 false
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; CHECK-NEXT: br i1 [[OR_COND]], label [[FOR_COND1_PREHEADER_LR_PH_SPLIT_US:%.*]], label [[FOR_COND_CLEANUP:%.*]]
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; CHECK: for.cond1.preheader.lr.ph.split.us:
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; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[M]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[N]] to i64
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; CHECK-NEXT: [[FLATTEN_TRIPCOUNT:%.*]] = mul nuw nsw i64 [[TMP0]], [[TMP1]]
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; CHECK-NEXT: br label [[FOR_COND1_PREHEADER_US:%.*]]
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; CHECK: for.cond1.preheader.us:
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; CHECK-NEXT: [[INDVAR6:%.*]] = phi i64 [ [[INDVAR_NEXT7:%.*]], [[FOR_COND1_PREHEADER_US]] ], [ 0, [[FOR_COND1_PREHEADER_LR_PH_SPLIT_US]] ]
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; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVAR6]]
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; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX_US]], align 4
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; CHECK-NEXT: tail call void @_Z1fi(i32 [[TMP2]])
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; CHECK-NEXT: [[INDVAR_NEXT7]] = add nuw i64 [[INDVAR6]], 1
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; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVAR_NEXT7]], [[FLATTEN_TRIPCOUNT]]
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; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_COND1_PREHEADER_US]]
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; CHECK: for.cond.cleanup:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for.cond
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for.cond:
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%i.0 = phi i32 [ 0, %entry ], [ %inc6, %for.cond.cleanup3 ]
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%cmp = icmp slt i32 %i.0, %N
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br i1 %cmp, label %for.body, label %for.cond.cleanup
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for.cond.cleanup:
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ret void
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for.body:
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br label %for.cond1
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for.cond1:
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%j.0 = phi i32 [ 0, %for.body ], [ %inc, %for.body4 ]
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%cmp2 = icmp slt i32 %j.0, %M
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br i1 %cmp2, label %for.body4, label %for.cond.cleanup3
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for.cond.cleanup3:
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%inc6 = add nsw i32 %i.0, 1
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br label %for.cond
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for.body4:
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%mul = mul nsw i32 %i.0, %M
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%add = add nsw i32 %mul, %j.0
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%idxprom = sext i32 %add to i64
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%arrayidx = getelementptr inbounds i32, ptr %A, i64 %idxprom
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%0 = load i32, ptr %arrayidx, align 4
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call void @_Z1fi(i32 %0)
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%inc = add nsw i32 %j.0, 1
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br label %for.cond1
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}
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declare dso_local void @_Z1fi(i32) #2
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