fa3d789df1
Refactor of the llvm-tblgen source into: - a "Basic" library, which contains the bare minimum utilities to build `llvm-min-tablegen` - a "Common" library which contains all of the helpers for TableGen backends. Such helpers can be shared by more than one backend, and even unit tested (e.g. CodeExpander is, maybe we can add more over time) Fixes #80647
348 lines
12 KiB
C++
348 lines
12 KiB
C++
//===- CodeGenInstruction.h - Instruction Class Wrapper ---------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines a wrapper class for the 'Instruction' TableGen class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_UTILS_TABLEGEN_CODEGENINSTRUCTION_H
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#define LLVM_UTILS_TABLEGEN_CODEGENINSTRUCTION_H
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/StringMap.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/CodeGenTypes/MachineValueType.h"
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#include "llvm/TableGen/Record.h"
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#include <cassert>
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#include <string>
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#include <utility>
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#include <vector>
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namespace llvm {
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class CodeGenTarget;
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class CGIOperandList {
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public:
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class ConstraintInfo {
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enum { None, EarlyClobber, Tied } Kind = None;
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unsigned OtherTiedOperand = 0;
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public:
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ConstraintInfo() = default;
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static ConstraintInfo getEarlyClobber() {
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ConstraintInfo I;
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I.Kind = EarlyClobber;
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I.OtherTiedOperand = 0;
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return I;
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}
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static ConstraintInfo getTied(unsigned Op) {
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ConstraintInfo I;
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I.Kind = Tied;
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I.OtherTiedOperand = Op;
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return I;
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}
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bool isNone() const { return Kind == None; }
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bool isEarlyClobber() const { return Kind == EarlyClobber; }
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bool isTied() const { return Kind == Tied; }
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unsigned getTiedOperand() const {
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assert(isTied());
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return OtherTiedOperand;
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}
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bool operator==(const ConstraintInfo &RHS) const {
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if (Kind != RHS.Kind)
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return false;
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if (Kind == Tied && OtherTiedOperand != RHS.OtherTiedOperand)
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return false;
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return true;
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}
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bool operator!=(const ConstraintInfo &RHS) const { return !(*this == RHS); }
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};
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/// OperandInfo - The information we keep track of for each operand in the
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/// operand list for a tablegen instruction.
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struct OperandInfo {
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/// Rec - The definition this operand is declared as.
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///
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Record *Rec;
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/// Name - If this operand was assigned a symbolic name, this is it,
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/// otherwise, it's empty.
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std::string Name;
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/// The names of sub-operands, if given, otherwise empty.
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std::vector<std::string> SubOpNames;
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/// PrinterMethodName - The method used to print operands of this type in
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/// the asmprinter.
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std::string PrinterMethodName;
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/// The method used to get the machine operand value for binary
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/// encoding, per sub-operand. If empty, uses "getMachineOpValue".
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std::vector<std::string> EncoderMethodNames;
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/// OperandType - A value from MCOI::OperandType representing the type of
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/// the operand.
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std::string OperandType;
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/// MIOperandNo - Currently (this is meant to be phased out), some logical
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/// operands correspond to multiple MachineInstr operands. In the X86
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/// target for example, one address operand is represented as 4
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/// MachineOperands. Because of this, the operand number in the
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/// OperandList may not match the MachineInstr operand num. Until it
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/// does, this contains the MI operand index of this operand.
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unsigned MIOperandNo;
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unsigned MINumOperands; // The number of operands.
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/// DoNotEncode - Bools are set to true in this vector for each operand in
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/// the DisableEncoding list. These should not be emitted by the code
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/// emitter.
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BitVector DoNotEncode;
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/// MIOperandInfo - Default MI operand type. Note an operand may be made
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/// up of multiple MI operands.
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DagInit *MIOperandInfo;
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/// Constraint info for this operand. This operand can have pieces, so we
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/// track constraint info for each.
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std::vector<ConstraintInfo> Constraints;
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OperandInfo(Record *R, const std::string &N, const std::string &PMN,
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const std::string &OT, unsigned MION, unsigned MINO,
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DagInit *MIOI)
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: Rec(R), Name(N), SubOpNames(MINO), PrinterMethodName(PMN),
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EncoderMethodNames(MINO), OperandType(OT), MIOperandNo(MION),
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MINumOperands(MINO), DoNotEncode(MINO), MIOperandInfo(MIOI),
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Constraints(MINO) {}
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/// getTiedOperand - If this operand is tied to another one, return the
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/// other operand number. Otherwise, return -1.
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int getTiedRegister() const {
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for (unsigned j = 0, e = Constraints.size(); j != e; ++j) {
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const CGIOperandList::ConstraintInfo &CI = Constraints[j];
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if (CI.isTied())
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return CI.getTiedOperand();
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}
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return -1;
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}
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};
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CGIOperandList(Record *D);
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Record *TheDef; // The actual record containing this OperandList.
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/// NumDefs - Number of def operands declared, this is the number of
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/// elements in the instruction's (outs) list.
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///
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unsigned NumDefs;
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/// OperandList - The list of declared operands, along with their declared
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/// type (which is a record).
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std::vector<OperandInfo> OperandList;
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/// SubOpAliases - List of alias names for suboperands.
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StringMap<std::pair<unsigned, unsigned>> SubOpAliases;
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// Information gleaned from the operand list.
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bool isPredicable;
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bool hasOptionalDef;
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bool isVariadic;
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// Provide transparent accessors to the operand list.
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bool empty() const { return OperandList.empty(); }
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unsigned size() const { return OperandList.size(); }
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const OperandInfo &operator[](unsigned i) const { return OperandList[i]; }
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OperandInfo &operator[](unsigned i) { return OperandList[i]; }
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OperandInfo &back() { return OperandList.back(); }
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const OperandInfo &back() const { return OperandList.back(); }
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typedef std::vector<OperandInfo>::iterator iterator;
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typedef std::vector<OperandInfo>::const_iterator const_iterator;
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iterator begin() { return OperandList.begin(); }
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const_iterator begin() const { return OperandList.begin(); }
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iterator end() { return OperandList.end(); }
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const_iterator end() const { return OperandList.end(); }
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/// getOperandNamed - Return the index of the operand with the specified
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/// non-empty name. If the instruction does not have an operand with the
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/// specified name, abort.
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unsigned getOperandNamed(StringRef Name) const;
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/// hasOperandNamed - Query whether the instruction has an operand of the
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/// given name. If so, return true and set OpIdx to the index of the
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/// operand. Otherwise, return false.
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bool hasOperandNamed(StringRef Name, unsigned &OpIdx) const;
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bool hasSubOperandAlias(StringRef Name,
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std::pair<unsigned, unsigned> &SubOp) const;
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/// ParseOperandName - Parse an operand name like "$foo" or "$foo.bar",
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/// where $foo is a whole operand and $foo.bar refers to a suboperand.
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/// This aborts if the name is invalid. If AllowWholeOp is true, references
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/// to operands with suboperands are allowed, otherwise not.
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std::pair<unsigned, unsigned> ParseOperandName(StringRef Op,
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bool AllowWholeOp = true);
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/// getFlattenedOperandNumber - Flatten a operand/suboperand pair into a
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/// flat machineinstr operand #.
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unsigned getFlattenedOperandNumber(std::pair<unsigned, unsigned> Op) const {
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return OperandList[Op.first].MIOperandNo + Op.second;
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}
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/// getSubOperandNumber - Unflatten a operand number into an
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/// operand/suboperand pair.
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std::pair<unsigned, unsigned> getSubOperandNumber(unsigned Op) const {
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for (unsigned i = 0;; ++i) {
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assert(i < OperandList.size() && "Invalid flat operand #");
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if (OperandList[i].MIOperandNo + OperandList[i].MINumOperands > Op)
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return std::pair(i, Op - OperandList[i].MIOperandNo);
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}
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}
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/// isFlatOperandNotEmitted - Return true if the specified flat operand #
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/// should not be emitted with the code emitter.
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bool isFlatOperandNotEmitted(unsigned FlatOpNo) const {
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std::pair<unsigned, unsigned> Op = getSubOperandNumber(FlatOpNo);
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if (OperandList[Op.first].DoNotEncode.size() > Op.second)
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return OperandList[Op.first].DoNotEncode[Op.second];
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return false;
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}
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void ProcessDisableEncoding(StringRef Value);
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};
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class CodeGenInstruction {
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public:
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Record *TheDef; // The actual record defining this instruction.
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StringRef Namespace; // The namespace the instruction is in.
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/// AsmString - The format string used to emit a .s file for the
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/// instruction.
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std::string AsmString;
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/// Operands - This is information about the (ins) and (outs) list specified
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/// to the instruction.
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CGIOperandList Operands;
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/// ImplicitDefs/ImplicitUses - These are lists of registers that are
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/// implicitly defined and used by the instruction.
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std::vector<Record *> ImplicitDefs, ImplicitUses;
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// Various boolean values we track for the instruction.
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bool isPreISelOpcode : 1;
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bool isReturn : 1;
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bool isEHScopeReturn : 1;
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bool isBranch : 1;
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bool isIndirectBranch : 1;
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bool isCompare : 1;
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bool isMoveImm : 1;
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bool isMoveReg : 1;
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bool isBitcast : 1;
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bool isSelect : 1;
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bool isBarrier : 1;
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bool isCall : 1;
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bool isAdd : 1;
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bool isTrap : 1;
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bool canFoldAsLoad : 1;
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bool mayLoad : 1;
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bool mayLoad_Unset : 1;
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bool mayStore : 1;
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bool mayStore_Unset : 1;
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bool mayRaiseFPException : 1;
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bool isPredicable : 1;
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bool isConvertibleToThreeAddress : 1;
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bool isCommutable : 1;
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bool isTerminator : 1;
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bool isReMaterializable : 1;
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bool hasDelaySlot : 1;
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bool usesCustomInserter : 1;
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bool hasPostISelHook : 1;
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bool hasCtrlDep : 1;
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bool isNotDuplicable : 1;
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bool hasSideEffects : 1;
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bool hasSideEffects_Unset : 1;
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bool isAsCheapAsAMove : 1;
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bool hasExtraSrcRegAllocReq : 1;
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bool hasExtraDefRegAllocReq : 1;
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bool isCodeGenOnly : 1;
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bool isPseudo : 1;
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bool isMeta : 1;
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bool isRegSequence : 1;
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bool isExtractSubreg : 1;
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bool isInsertSubreg : 1;
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bool isConvergent : 1;
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bool hasNoSchedulingInfo : 1;
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bool FastISelShouldIgnore : 1;
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bool hasChain : 1;
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bool hasChain_Inferred : 1;
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bool variadicOpsAreDefs : 1;
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bool isAuthenticated : 1;
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std::string DeprecatedReason;
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bool HasComplexDeprecationPredicate;
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/// Are there any undefined flags?
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bool hasUndefFlags() const {
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return mayLoad_Unset || mayStore_Unset || hasSideEffects_Unset;
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}
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// The record used to infer instruction flags, or NULL if no flag values
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// have been inferred.
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Record *InferredFrom;
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// The enum value assigned by CodeGenTarget::computeInstrsByEnum.
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mutable unsigned EnumVal = 0;
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CodeGenInstruction(Record *R);
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/// HasOneImplicitDefWithKnownVT - If the instruction has at least one
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/// implicit def and it has a known VT, return the VT, otherwise return
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/// MVT::Other.
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MVT::SimpleValueType
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HasOneImplicitDefWithKnownVT(const CodeGenTarget &TargetInfo) const;
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/// FlattenAsmStringVariants - Flatten the specified AsmString to only
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/// include text from the specified variant, returning the new string.
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static std::string FlattenAsmStringVariants(StringRef AsmString,
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unsigned Variant);
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// Is the specified operand in a generic instruction implicitly a pointer.
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// This can be used on intructions that use typeN or ptypeN to identify
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// operands that should be considered as pointers even though SelectionDAG
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// didn't make a distinction between integer and pointers.
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bool isInOperandAPointer(unsigned i) const {
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return isOperandImpl("InOperandList", i, "IsPointer");
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}
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bool isOutOperandAPointer(unsigned i) const {
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return isOperandImpl("OutOperandList", i, "IsPointer");
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}
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/// Check if the operand is required to be an immediate.
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bool isInOperandImmArg(unsigned i) const {
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return isOperandImpl("InOperandList", i, "IsImmediate");
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}
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/// Return true if the instruction uses a variable length encoding.
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bool isVariableLengthEncoding() const {
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const RecordVal *RV = TheDef->getValue("Inst");
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return RV && isa<DagInit>(RV->getValue());
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}
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private:
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bool isOperandImpl(StringRef OpListName, unsigned i,
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StringRef PropertyName) const;
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};
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} // namespace llvm
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#endif
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