f388a3a446
The doc and examples of the [dis]assemble operations did not reflect all the recent changes on order of the operands. Also clarified some of the text.
315 lines
9.7 KiB
MLIR
315 lines
9.7 KiB
MLIR
//--------------------------------------------------------------------------------------------------
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// WHEN CREATING A NEW TEST, PLEASE JUST COPY & PASTE WITHOUT EDITS.
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//
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// Set-up that's shared across all tests in this directory. In principle, this
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// config could be moved to lit.local.cfg. However, there are downstream users that
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// do not use these LIT config files. Hence why this is kept inline.
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//
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// DEFINE: %{sparsifier_opts} = enable-runtime-library=true
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// DEFINE: %{sparsifier_opts_sve} = enable-arm-sve=true %{sparsifier_opts}
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// DEFINE: %{compile} = mlir-opt %s --sparsifier="%{sparsifier_opts}"
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// DEFINE: %{compile_sve} = mlir-opt %s --sparsifier="%{sparsifier_opts_sve}"
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// DEFINE: %{run_libs} = -shared-libs=%mlir_c_runner_utils,%mlir_runner_utils
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// DEFINE: %{run_opts} = -e main -entry-point-result=void
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// DEFINE: %{run} = mlir-cpu-runner %{run_opts} %{run_libs}
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// DEFINE: %{run_sve} = %mcr_aarch64_cmd --march=aarch64 --mattr="+sve" %{run_opts} %{run_libs}
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//
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// DEFINE: %{env} =
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//--------------------------------------------------------------------------------------------------
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// RUN: %{compile} | %{run} | FileCheck %s
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//
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// Do the same run, but now with direct IR generation.
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// REDEFINE: %{sparsifier_opts} = enable-runtime-library=false
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// RUN: %{compile} | %{run} | FileCheck %s
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//
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// Do the same run, but now with direct IR generation and vectorization.
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// REDEFINE: %{sparsifier_opts} = enable-runtime-library=false vl=2 reassociate-fp-reductions=true enable-index-optimizations=true
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// RUN: %{compile} | %{run} | FileCheck %s
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//
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// Do the same run, but now with direct IR generation and VLA vectorization.
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// RUN: %if mlir_arm_sve_tests %{ %{compile_sve} | %{run_sve} | FileCheck %s %}
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#SortedCOO = #sparse_tensor.encoding<{
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map = (d0, d1) -> (d0 : compressed(nonunique), d1 : singleton)
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}>
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#SortedCOOI32 = #sparse_tensor.encoding<{
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map = (d0, d1) -> (d0 : compressed(nonunique), d1 : singleton),
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posWidth = 32,
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crdWidth = 32
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}>
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#CSR = #sparse_tensor.encoding<{
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map = (d0, d1) -> (d0 : dense, d1 : compressed),
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posWidth = 32,
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crdWidth = 32
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}>
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#BCOO = #sparse_tensor.encoding<{
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map = (d0, d1, d2) -> (d0 : dense, d1 : loose_compressed(nonunique), d2 : singleton)
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}>
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module {
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//
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// Main driver.
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//
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func.func @main() {
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%c0 = arith.constant 0 : index
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%f0 = arith.constant 0.0 : f64
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%i0 = arith.constant 0 : i32
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//
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// Setup COO.
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//
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%data = arith.constant dense<
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[ 1.0, 2.0, 3.0 ]
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> : tensor<3xf64>
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%pos = arith.constant dense<
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[0, 3]
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> : tensor<2xindex>
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%index = arith.constant dense<
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[[ 1, 2],
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[ 5, 6],
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[ 7, 8]]
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> : tensor<3x2xindex>
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%pos32 = arith.constant dense<
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[0, 3]
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> : tensor<2xi32>
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%index32 = arith.constant dense<
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[[ 1, 2],
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[ 5, 6],
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[ 7, 8]]
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> : tensor<3x2xi32>
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%s4 = sparse_tensor.assemble (%pos, %index), %data : (tensor<2xindex>, tensor<3x2xindex>), tensor<3xf64>
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to tensor<10x10xf64, #SortedCOO>
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%s5 = sparse_tensor.assemble (%pos32, %index32), %data : (tensor<2xi32>, tensor<3x2xi32>), tensor<3xf64>
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to tensor<10x10xf64, #SortedCOOI32>
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//
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// Setup CSR.
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//
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%csr_data = arith.constant dense<
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[ 1.0, 2.0, 3.0 ]
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> : tensor<3xf64>
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%csr_pos32 = arith.constant dense<
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[0, 1, 3]
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> : tensor<3xi32>
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%csr_index32 = arith.constant dense<
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[1, 0, 1]
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> : tensor<3xi32>
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%csr = sparse_tensor.assemble (%csr_pos32, %csr_index32), %csr_data : (tensor<3xi32>, tensor<3xi32>), tensor<3xf64>
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to tensor<2x2xf64, #CSR>
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//
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// Setup BCOO.
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//
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%bdata = arith.constant dense<
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[ 1.0, 2.0, 3.0, 4.0, 5.0 ]
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> : tensor<5xf64>
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%bpos = arith.constant dense<
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[0, 3, 3, 5]
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> : tensor<4xindex>
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%bindex = arith.constant dense<
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[[ 1, 2],
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[ 5, 6],
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[ 7, 8],
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[ 2, 3],
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[ 4, 2],
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[ 10, 10]]
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> : tensor<6x2xindex>
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%bs = sparse_tensor.assemble (%bpos, %bindex), %bdata :
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(tensor<4xindex>, tensor<6x2xindex>), tensor<5xf64> to tensor<2x10x10xf64, #BCOO>
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//
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// Verify results.
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//
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// CHECK: 1
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// CHECK-NEXT:2
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// CHECK-NEXT:1
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//
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// CHECK-NEXT:5
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// CHECK-NEXT:6
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// CHECK-NEXT:2
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//
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// CHECK-NEXT:7
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// CHECK-NEXT:8
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// CHECK-NEXT:3
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sparse_tensor.foreach in %s4 : tensor<10x10xf64, #SortedCOO> do {
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^bb0(%1: index, %2: index, %v: f64) :
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vector.print %1: index
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vector.print %2: index
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vector.print %v: f64
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}
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// CHECK-NEXT:1
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// CHECK-NEXT:2
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// CHECK-NEXT:1
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//
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// CHECK-NEXT:5
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// CHECK-NEXT:6
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// CHECK-NEXT:2
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//
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// CHECK-NEXT:7
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// CHECK-NEXT:8
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// CHECK-NEXT:3
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sparse_tensor.foreach in %s5 : tensor<10x10xf64, #SortedCOOI32> do {
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^bb0(%1: index, %2: index, %v: f64) :
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vector.print %1: index
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vector.print %2: index
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vector.print %v: f64
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}
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// CHECK-NEXT:0
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// CHECK-NEXT:1
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// CHECK-NEXT:1
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//
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// CHECK-NEXT:1
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// CHECK-NEXT:0
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// CHECK-NEXT:2
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//
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// CHECK-NEXT:1
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// CHECK-NEXT:1
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// CHECK-NEXT:3
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sparse_tensor.foreach in %csr : tensor<2x2xf64, #CSR> do {
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^bb0(%1: index, %2: index, %v: f64) :
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vector.print %1: index
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vector.print %2: index
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vector.print %v: f64
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}
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// CHECK-NEXT:0
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// CHECK-NEXT:1
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// CHECK-NEXT:2
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// CHECK-NEXT:1
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//
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// CHECK-NEXT:0
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// CHECK-NEXT:5
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// CHECK-NEXT:6
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// CHECK-NEXT:2
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//
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// CHECK-NEXT:0
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// CHECK-NEXT:7
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// CHECK-NEXT:8
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// CHECK-NEXT:3
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//
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// CHECK-NEXT:1
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// CHECK-NEXT:2
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// CHECK-NEXT:3
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// CHECK-NEXT:4
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//
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// CHECK-NEXT:1
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// CHECK-NEXT:4
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// CHECK-NEXT:2
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// CHECK-NEXT:5
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sparse_tensor.foreach in %bs : tensor<2x10x10xf64, #BCOO> do {
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^bb0(%0: index, %1: index, %2: index, %v: f64) :
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vector.print %0: index
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vector.print %1: index
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vector.print %2: index
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vector.print %v: f64
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}
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//
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// Verify disassemble operations.
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//
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%od = tensor.empty() : tensor<3xf64>
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%op = tensor.empty() : tensor<2xi32>
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%oi = tensor.empty() : tensor<3x2xi32>
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%p, %i, %d, %pl, %il, %dl = sparse_tensor.disassemble %s5 : tensor<10x10xf64, #SortedCOOI32>
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out_lvls(%op, %oi : tensor<2xi32>, tensor<3x2xi32>)
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out_vals(%od : tensor<3xf64>)
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-> (tensor<2xi32>, tensor<3x2xi32>), tensor<3xf64>, (i32, i64), index
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// CHECK-NEXT: ( 1, 2, 3 )
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%vd = vector.transfer_read %d[%c0], %f0 : tensor<3xf64>, vector<3xf64>
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vector.print %vd : vector<3xf64>
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// CHECK-NEXT: ( ( 1, 2 ), ( 5, 6 ), ( 7, 8 ) )
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%vi = vector.transfer_read %i[%c0, %c0], %i0 : tensor<3x2xi32>, vector<3x2xi32>
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vector.print %vi : vector<3x2xi32>
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// CHECK-NEXT: 3
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vector.print %dl : index
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%d_csr = tensor.empty() : tensor<4xf64>
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%p_csr = tensor.empty() : tensor<3xi32>
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%i_csr = tensor.empty() : tensor<3xi32>
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%rp_csr, %ri_csr, %rd_csr, %lp_csr, %li_csr, %ld_csr = sparse_tensor.disassemble %csr : tensor<2x2xf64, #CSR>
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out_lvls(%p_csr, %i_csr : tensor<3xi32>, tensor<3xi32>)
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out_vals(%d_csr : tensor<4xf64>)
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-> (tensor<3xi32>, tensor<3xi32>), tensor<4xf64>, (i32, i64), index
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// CHECK-NEXT: ( 1, 2, 3 )
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%vd_csr = vector.transfer_read %rd_csr[%c0], %f0 : tensor<4xf64>, vector<3xf64>
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vector.print %vd_csr : vector<3xf64>
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// CHECK-NEXT: 3
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vector.print %ld_csr : index
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%bod = tensor.empty() : tensor<6xf64>
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%bop = tensor.empty() : tensor<4xindex>
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%boi = tensor.empty() : tensor<6x2xindex>
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%bp, %bi, %bd, %lp, %li, %ld = sparse_tensor.disassemble %bs : tensor<2x10x10xf64, #BCOO>
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out_lvls(%bop, %boi : tensor<4xindex>, tensor<6x2xindex>)
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out_vals(%bod : tensor<6xf64>)
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-> (tensor<4xindex>, tensor<6x2xindex>), tensor<6xf64>, (i32, tensor<i64>), index
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// CHECK-NEXT: ( 1, 2, 3, 4, 5 )
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%vbd = vector.transfer_read %bd[%c0], %f0 : tensor<6xf64>, vector<5xf64>
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vector.print %vbd : vector<5xf64>
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// CHECK-NEXT: 5
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vector.print %ld : index
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// CHECK-NEXT: ( ( 1, 2 ), ( 5, 6 ), ( 7, 8 ), ( 2, 3 ), ( 4, 2 ), ( {{.*}}, {{.*}} ) )
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%vbi = vector.transfer_read %bi[%c0, %c0], %c0 : tensor<6x2xindex>, vector<6x2xindex>
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vector.print %vbi : vector<6x2xindex>
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// CHECK-NEXT: 10
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%si = tensor.extract %li[] : tensor<i64>
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vector.print %si : i64
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// TODO: This check is no longer needed once the codegen path uses the
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// buffer deallocation pass. "dealloc_tensor" turn into a no-op in the
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// codegen path.
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%has_runtime = sparse_tensor.has_runtime_library
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scf.if %has_runtime {
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// sparse_tensor.assemble copies buffers when running with the runtime
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// library. Deallocations are not needed when running in codegen mode.
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bufferization.dealloc_tensor %s4 : tensor<10x10xf64, #SortedCOO>
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bufferization.dealloc_tensor %s5 : tensor<10x10xf64, #SortedCOOI32>
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bufferization.dealloc_tensor %csr : tensor<2x2xf64, #CSR>
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bufferization.dealloc_tensor %bs : tensor<2x10x10xf64, #BCOO>
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}
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bufferization.dealloc_tensor %li : tensor<i64>
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bufferization.dealloc_tensor %od : tensor<3xf64>
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bufferization.dealloc_tensor %op : tensor<2xi32>
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bufferization.dealloc_tensor %oi : tensor<3x2xi32>
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bufferization.dealloc_tensor %d_csr : tensor<4xf64>
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bufferization.dealloc_tensor %p_csr : tensor<3xi32>
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bufferization.dealloc_tensor %i_csr : tensor<3xi32>
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bufferization.dealloc_tensor %bod : tensor<6xf64>
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bufferization.dealloc_tensor %bop : tensor<4xindex>
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bufferization.dealloc_tensor %boi : tensor<6x2xindex>
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return
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}
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}
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