1e9bfcd9a4
isAccessIndexInvariant had outdated code and didn't handle IR with multiple affine.apply ops, which is inconvenient when used as a utility. This is addressed by switching to use the proper API on AffineValueMap. Add mlir::affine::isInvariantAccess exposed for outside use and tested via the test pass. Add a method on AffineValueMap. Add test cases to exercise simplification and composition for invariant access analysis. A TODO/FIXME has been added but this issue existed before.
91 lines
3.2 KiB
C++
91 lines
3.2 KiB
C++
//===- TestAccessAnalysis.cpp - Test affine access analysis utility -------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a pass to test affine access analysis utilities.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/Affine/Analysis/LoopAnalysis.h"
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#include "mlir/Dialect/Affine/Analysis/Utils.h"
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#include "mlir/Dialect/Affine/LoopFusionUtils.h"
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#include "mlir/Dialect/Func/IR/FuncOps.h"
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#include "mlir/Pass/Pass.h"
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#define PASS_NAME "test-affine-access-analysis"
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using namespace mlir;
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using namespace mlir::affine;
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namespace {
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struct TestAccessAnalysis
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: public PassWrapper<TestAccessAnalysis, OperationPass<func::FuncOp>> {
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MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(TestAccessAnalysis)
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StringRef getArgument() const final { return PASS_NAME; }
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StringRef getDescription() const final {
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return "Tests affine memory access analysis utility";
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}
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void runOnOperation() override;
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};
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} // namespace
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/// Gathers all affine load/store ops in loop nest rooted at 'forOp' into
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/// 'loadAndStoreOps'.
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static void
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gatherLoadsAndStores(AffineForOp forOp,
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SmallVectorImpl<Operation *> &loadAndStoreOps) {
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forOp.walk([&](Operation *op) {
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if (isa<AffineReadOpInterface, AffineWriteOpInterface>(op))
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loadAndStoreOps.push_back(op);
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});
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}
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void TestAccessAnalysis::runOnOperation() {
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SmallVector<Operation *> loadStores;
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SmallVector<AffineForOp> enclosingOps;
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// Go over all top-level affine.for ops and test each contained affine
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// access's contiguity along every surrounding loop IV.
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for (auto forOp : getOperation().getOps<AffineForOp>()) {
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loadStores.clear();
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gatherLoadsAndStores(forOp, loadStores);
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for (Operation *memOp : loadStores) {
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enclosingOps.clear();
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getAffineForIVs(*memOp, &enclosingOps);
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for (unsigned d = 0, e = enclosingOps.size(); d < e; d++) {
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AffineForOp loop = enclosingOps[d];
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int memRefDim;
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bool isContiguous, isInvariant;
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if (auto read = dyn_cast<AffineReadOpInterface>(memOp)) {
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isContiguous =
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isContiguousAccess(loop.getInductionVar(), read, &memRefDim);
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isInvariant = isInvariantAccess(read, loop);
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} else {
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auto write = cast<AffineWriteOpInterface>(memOp);
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isContiguous =
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isContiguousAccess(loop.getInductionVar(), write, &memRefDim);
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isInvariant = isInvariantAccess(write, loop);
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}
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// Check for contiguity for the innermost memref dimension to avoid
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// emitting too many diagnostics.
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if (isContiguous && memRefDim == 0)
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memOp->emitRemark("contiguous along loop ") << d << '\n';
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if (isInvariant)
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memOp->emitRemark("invariant along loop ") << d << '\n';
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}
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}
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}
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}
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namespace mlir {
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void registerTestAffineAccessAnalysisPass() {
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PassRegistration<TestAccessAnalysis>();
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}
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} // namespace mlir
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