Sebastian Pop b4bd0a404f [x86][aarch64] ask the backend whether it has a vector blend instruction ...

The code to match and produce more x86 vector blends was enabled for all
architectures even though the transform may pessimize the code for other
architectures that do not provide a vector blend instruction.

Added an aarch64 testcase to check that a VZIP instruction is generated instead
of byte movs.

Differential Revision: https://reviews.llvm.org/D44118

llvm-svn: 327132

2018-03-09 14:29:21 +00:00

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