Craig Topper 644899addd [RISCV][GISel] Port portions of float-intrinsics.ll and double-intrinsics.ll. NFC ...

Remove the legalizer test for the same intrinsics as it is no longer
interesting with end to end tests.

2024-09-18 13:13:34 -07:00

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AArch64

[DAG] Fold vecreduce.or(sext(x)) to sext(vecreduce.or(x)) (#108959)

2024-09-17 15:24:00 +01:00

AMDGPU

[AMDGPU] Simplify lowerBUILD_VECTOR (#109094)

2024-09-18 12:58:16 +02:00

ARC

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ARM

[ARM] Fix VBICimm and VORRimm generation under Big endian. (#107813)

2024-09-13 10:59:57 +01:00

AVR

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BPF

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CSKY

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DirectX

[HLSL] Implement elementwise popcount (#108121)

2024-09-18 08:19:52 -07:00

Generic

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Hexagon

[HEXAGON] AddrModeOpt support for HVX and optimize adds (#106368)

2024-09-13 18:48:34 -05:00

Inputs

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Lanai

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LoongArch

[DAGCombine] Count leading ones: refine post DAG/Type Legalisation if promotion (#102877)

2024-09-15 15:48:36 +04:00

M68k

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Mips

[Mips] Optimize or (and $src1, mask), (shl $src2, shift) to ins (#103017)

2024-09-13 00:05:54 +08:00

MIR

[HEXAGON] AddrModeOpt support for HVX and optimize adds (#106368)

2024-09-13 18:48:34 -05:00

MLRegAlloc

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MSP430

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NVPTX

[NVPTX] Emit ld.v4.b16 for loading <4 x bfloat> (#109069)

2024-09-17 21:06:46 -07:00

PowerPC

[PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062)

2024-09-10 14:14:01 -04:00

RISCV

[RISCV][GISel] Port portions of float-intrinsics.ll and double-intrinsics.ll. NFC

2024-09-18 13:13:34 -07:00

SPARC

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SPIRV

[HLSL] Implement elementwise popcount (#108121)

2024-09-18 08:19:52 -07:00

SystemZ

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Thumb

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Thumb2

Revert2 "[DebugInfo][DWARF] Set is_stmt on first non-line-0 instruction in BB (#105524)"

2024-09-17 18:29:20 +01:00

VE

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WebAssembly

[WebAssembly] Support binary generation for new EH (#109027)

2024-09-17 14:58:19 -07:00

WinCFGuard

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WinEH

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X86

Revert "[X86][BF16] Add libcall for F80 -> BF16" (#109140)

2024-09-18 21:35:38 +08:00

XCore

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Xtensa

[Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (#107363)

2024-09-13 21:33:54 +03:00