Implicit defs and uses on spill stores were accounted as real defs and uses, while only exist for liveness accounting. As a result unneded waits were generated. Fixes: SWDEV-484177
90 lines
3.3 KiB
YAML
90 lines
3.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
|
|
# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass si-insert-waitcnts %s -o - | FileCheck -check-prefix=GCN %s
|
|
|
|
# There shall be no S_WAITCNT between two stores.
|
|
|
|
---
|
|
name: spill_vgpr_tuple
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $sgpr76_sgpr77_sgpr78_sgpr79
|
|
|
|
; GCN-LABEL: name: spill_vgpr_tuple
|
|
; GCN: liveins: $vgpr0_vgpr1, $sgpr76_sgpr77_sgpr78_sgpr79
|
|
; GCN-NEXT: {{ $}}
|
|
; GCN-NEXT: S_WAITCNT 0
|
|
; GCN-NEXT: $vgpr64_vgpr65 = V_MOV_B64_e32 $vgpr0_vgpr1, implicit $exec
|
|
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr64, $sgpr76_sgpr77_sgpr78_sgpr79, 0, 672, 0, 0, implicit $exec, implicit-def $vgpr64_vgpr65, implicit $vgpr64_vgpr65
|
|
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr65, $sgpr76_sgpr77_sgpr78_sgpr79, 0, 676, 0, 0, implicit $exec, implicit $vgpr64_vgpr65
|
|
; GCN-NEXT: S_ENDPGM 0
|
|
$vgpr64_vgpr65 = V_MOV_B64_e32 $vgpr0_vgpr1, implicit $exec
|
|
BUFFER_STORE_DWORD_OFFSET killed $vgpr64, $sgpr76_sgpr77_sgpr78_sgpr79, 0, 672, 0, 0, implicit $exec, implicit-def $vgpr64_vgpr65, implicit $vgpr64_vgpr65
|
|
BUFFER_STORE_DWORD_OFFSET $vgpr65, $sgpr76_sgpr77_sgpr78_sgpr79, 0, 676, 0, 0, implicit $exec, implicit $vgpr64_vgpr65
|
|
S_ENDPGM 0
|
|
...
|
|
|
|
# Make sure that while ignoring implicit operands we will not ignore implicit $vcc on VALU
|
|
|
|
---
|
|
name: load_vcc_wait
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0, $sgpr10_sgpr11
|
|
|
|
; GCN-LABEL: name: load_vcc_wait
|
|
; GCN: liveins: $vgpr0, $sgpr10_sgpr11
|
|
; GCN-NEXT: {{ $}}
|
|
; GCN-NEXT: S_WAITCNT 0
|
|
; GCN-NEXT: $vcc_lo = S_LOAD_DWORD_IMM $sgpr10_sgpr11, 0, 0
|
|
; GCN-NEXT: S_WAITCNT 49279
|
|
; GCN-NEXT: $vgpr1 = V_ADDC_U32_e32 0, $vgpr0, implicit-def $vcc, implicit $vcc, implicit $exec
|
|
; GCN-NEXT: S_ENDPGM 0
|
|
$vcc_lo = S_LOAD_DWORD_IMM $sgpr10_sgpr11, 0, 0
|
|
$vgpr1 = V_ADDC_U32_e32 0, $vgpr0, implicit-def $vcc, implicit $vcc, implicit $exec
|
|
S_ENDPGM 0
|
|
...
|
|
|
|
# Make sure that while ignoring implicit operands we will not ignore implicit $flat_src on FLAT
|
|
|
|
---
|
|
name: load_flat_scr_lo_flat_load_wait
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr10_sgpr11, $vgpr0_vgpr1
|
|
|
|
; GCN-LABEL: name: load_flat_scr_lo_flat_load_wait
|
|
; GCN: liveins: $sgpr10_sgpr11, $vgpr0_vgpr1
|
|
; GCN-NEXT: {{ $}}
|
|
; GCN-NEXT: S_WAITCNT 0
|
|
; GCN-NEXT: $flat_scr_lo = S_LOAD_DWORD_IMM $sgpr10_sgpr11, 0, 0
|
|
; GCN-NEXT: S_WAITCNT 49279
|
|
; GCN-NEXT: $vgpr2 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr
|
|
; GCN-NEXT: S_ENDPGM 0
|
|
$flat_scr_lo = S_LOAD_DWORD_IMM $sgpr10_sgpr11, 0, 0
|
|
$vgpr2 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr
|
|
S_ENDPGM 0
|
|
...
|
|
|
|
---
|
|
name: load_flat_scr_lo_scratch_store_wait
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr10_sgpr11, $vgpr0, $sgpr32
|
|
|
|
; GCN-LABEL: name: load_flat_scr_lo_scratch_store_wait
|
|
; GCN: liveins: $sgpr10_sgpr11, $vgpr0, $sgpr32
|
|
; GCN-NEXT: {{ $}}
|
|
; GCN-NEXT: S_WAITCNT 0
|
|
; GCN-NEXT: $flat_scr_hi = S_LOAD_DWORD_IMM $sgpr10_sgpr11, 0, 0
|
|
; GCN-NEXT: S_WAITCNT 49279
|
|
; GCN-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr
|
|
; GCN-NEXT: S_ENDPGM 0
|
|
$flat_scr_hi = S_LOAD_DWORD_IMM $sgpr10_sgpr11, 0, 0
|
|
SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr
|
|
S_ENDPGM 0
|
|
...
|