f9c98068c8
This PR contains changes in virtual register processing aimed to improve correctness of emitted MIR between passes from the perspective of MachineVerifier. This potentially helps to detect previously missed flaws in code emission and harden the test suite. As a measure of correctness and usefulness of this PR we may use a mode with expensive checks set on, and MachineVerifier reports problems in the test suite. In order to satisfy Machine Verifier requirements to MIR correctness not only a rework of usage of virtual registers' types and classes is required, but also corrections into pre-legalizer and instruction selection logics. Namely, the following changes are introduced: * scalar virtual registers have proper bit width, * detect register class by SPIR-V type, * add a superclass for id virtual register classes, * fix Tablegen rules used for instruction selection, * fixes of minor existed issues (missed flag for proper representation of a null constant for OpenCL vs. HLSL, wrong usage of integer virtual registers as a synonym of any non-type virtual register).
156 lines
6.4 KiB
LLVM
156 lines
6.4 KiB
LLVM
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; CHECK-DAG: OpName [[ADD:%.*]] "test_add"
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; CHECK-DAG: OpName [[SUB:%.*]] "test_sub"
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; CHECK-DAG: OpName [[MIN:%.*]] "test_min"
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; CHECK-DAG: OpName [[MAX:%.*]] "test_max"
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; CHECK-DAG: OpName [[UMIN:%.*]] "test_umin"
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; CHECK-DAG: OpName [[UMAX:%.*]] "test_umax"
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; CHECK-DAG: OpName [[AND:%.*]] "test_and"
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; CHECK-DAG: OpName [[OR:%.*]] "test_or"
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; CHECK-DAG: OpName [[XOR:%.*]] "test_xor"
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; CHECK-DAG: [[I32Ty:%.*]] = OpTypeInt 32 0
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; CHECK-DAG: [[PtrI32Ty:%.*]] = OpTypePointer Function [[I32Ty]]
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; CHECK-DAG: [[I64Ty:%.*]] = OpTypeInt 64 0
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; CHECK-DAG: [[PtrI64Ty:%.*]] = OpTypePointer Generic [[I64Ty]]
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;; Device scope is encoded with constant 1
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; CHECK-DAG: [[SCOPE:%.*]] = OpConstant [[I32Ty]] 1
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;; "monotonic" maps to the relaxed memory semantics, encoded with constant 0
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; CHECK-DAG: [[RELAXED:%.*]] = OpConstantNull [[I32Ty]]
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; CHECK: [[ADD]] = OpFunction [[I32Ty]]
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; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[PtrI32Ty]]
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; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter [[I32Ty]]
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: [[R:%.*]] = OpAtomicIAdd [[I32Ty]] [[A]] [[SCOPE]] [[RELAXED]] [[B]]
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; CHECK-NEXT: OpReturnValue [[R]]
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; CHECK-NEXT: OpFunctionEnd
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define i32 @test_add(i32* %ptr, i32 %val) {
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%r = atomicrmw add i32* %ptr, i32 %val monotonic
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ret i32 %r
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}
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; CHECK: [[SUB]] = OpFunction [[I32Ty]]
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; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[PtrI32Ty]]
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; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter [[I32Ty]]
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: [[R:%.*]] = OpAtomicISub [[I32Ty]] [[A]] [[SCOPE]] [[RELAXED]] [[B]]
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; CHECK-NEXT: OpReturnValue [[R]]
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; CHECK-NEXT: OpFunctionEnd
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define i32 @test_sub(i32* %ptr, i32 %val) {
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%r = atomicrmw sub i32* %ptr, i32 %val monotonic
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ret i32 %r
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}
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; CHECK: [[MIN]] = OpFunction [[I32Ty]]
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; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[PtrI32Ty]]
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; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter [[I32Ty]]
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: [[R:%.*]] = OpAtomicSMin [[I32Ty]] [[A]] [[SCOPE]] [[RELAXED]] [[B]]
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; CHECK-NEXT: OpReturnValue [[R]]
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; CHECK-NEXT: OpFunctionEnd
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define i32 @test_min(i32* %ptr, i32 %val) {
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%r = atomicrmw min i32* %ptr, i32 %val monotonic
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ret i32 %r
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}
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; CHECK: [[MAX]] = OpFunction [[I32Ty]]
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; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[PtrI32Ty]]
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; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter [[I32Ty]]
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: [[R:%.*]] = OpAtomicSMax [[I32Ty]] [[A]] [[SCOPE]] [[RELAXED]] [[B]]
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; CHECK-NEXT: OpReturnValue [[R]]
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; CHECK-NEXT: OpFunctionEnd
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define i32 @test_max(i32* %ptr, i32 %val) {
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%r = atomicrmw max i32* %ptr, i32 %val monotonic
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ret i32 %r
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}
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; CHECK: [[UMIN]] = OpFunction [[I32Ty]]
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; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[PtrI32Ty]]
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; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter [[I32Ty]]
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: [[R:%.*]] = OpAtomicUMin [[I32Ty]] [[A]] [[SCOPE]] [[RELAXED]] [[B]]
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; CHECK-NEXT: OpReturnValue [[R]]
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; CHECK-NEXT: OpFunctionEnd
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define i32 @test_umin(i32* %ptr, i32 %val) {
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%r = atomicrmw umin i32* %ptr, i32 %val monotonic
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ret i32 %r
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}
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; CHECK: [[UMAX]] = OpFunction [[I32Ty]]
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; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[PtrI32Ty]]
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; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter [[I32Ty]]
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: [[R:%.*]] = OpAtomicUMax [[I32Ty]] [[A]] [[SCOPE]] [[RELAXED]] [[B]]
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; CHECK-NEXT: OpReturnValue [[R]]
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; CHECK-NEXT: OpFunctionEnd
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define i32 @test_umax(i32* %ptr, i32 %val) {
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%r = atomicrmw umax i32* %ptr, i32 %val monotonic
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ret i32 %r
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}
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; CHECK: [[AND]] = OpFunction [[I32Ty]]
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; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[PtrI32Ty]]
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; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter [[I32Ty]]
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: [[R:%.*]] = OpAtomicAnd [[I32Ty]] [[A]] [[SCOPE]] [[RELAXED]] [[B]]
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; CHECK-NEXT: OpReturnValue [[R]]
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; CHECK-NEXT: OpFunctionEnd
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define i32 @test_and(i32* %ptr, i32 %val) {
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%r = atomicrmw and i32* %ptr, i32 %val monotonic
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ret i32 %r
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}
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; CHECK: [[OR]] = OpFunction [[I32Ty]]
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; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[PtrI32Ty]]
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; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter [[I32Ty]]
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: [[R:%.*]] = OpAtomicOr [[I32Ty]] [[A]] [[SCOPE]] [[RELAXED]] [[B]]
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; CHECK-NEXT: OpReturnValue [[R]]
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; CHECK-NEXT: OpFunctionEnd
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define i32 @test_or(i32* %ptr, i32 %val) {
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%r = atomicrmw or i32* %ptr, i32 %val monotonic
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ret i32 %r
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}
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; CHECK: [[XOR]] = OpFunction [[I32Ty]]
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; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[PtrI32Ty]]
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; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter [[I32Ty]]
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: [[R:%.*]] = OpAtomicXor [[I32Ty]] [[A]] [[SCOPE]] [[RELAXED]] [[B]]
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; CHECK-NEXT: OpReturnValue [[R]]
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; CHECK-NEXT: OpFunctionEnd
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define i32 @test_xor(i32* %ptr, i32 %val) {
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%r = atomicrmw xor i32* %ptr, i32 %val monotonic
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ret i32 %r
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}
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; CHECK: OpFunction
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; CHECK-NEXT: [[Arg1:%.*]] = OpFunctionParameter [[PtrI64Ty]]
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; CHECK-NEXT: [[Arg2:%.*]] = OpFunctionParameter [[I64Ty]]
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: OpAtomicSMin [[I64Ty]] [[Arg1]] [[SCOPE]] [[RELAXED]] [[Arg2]]
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; CHECK-NEXT: OpAtomicSMax [[I64Ty]] [[Arg1]] [[SCOPE]] [[RELAXED]] [[Arg2]]
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; CHECK-NEXT: OpAtomicUMin [[I64Ty]] [[Arg1]] [[SCOPE]] [[RELAXED]] [[Arg2]]
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; CHECK-NEXT: OpAtomicUMax [[I64Ty]] [[Arg1]] [[SCOPE]] [[RELAXED]] [[Arg2]]
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; CHECK-NEXT: OpReturn
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; CHECK-NEXT: OpFunctionEnd
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define dso_local spir_kernel void @test_wrappers(ptr addrspace(4) %arg, i64 %val) {
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%r1 = call spir_func i64 @__spirv_AtomicSMin(ptr addrspace(4) %arg, i32 1, i32 0, i64 %val)
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%r2 = call spir_func i64 @__spirv_AtomicSMax(ptr addrspace(4) %arg, i32 1, i32 0, i64 %val)
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%r3 = call spir_func i64 @__spirv_AtomicUMin(ptr addrspace(4) %arg, i32 1, i32 0, i64 %val)
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%r4 = call spir_func i64 @__spirv_AtomicUMax(ptr addrspace(4) %arg, i32 1, i32 0, i64 %val)
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ret void
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}
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declare dso_local spir_func i64 @__spirv_AtomicSMin(ptr addrspace(4), i32, i32, i64)
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declare dso_local spir_func i64 @__spirv_AtomicSMax(ptr addrspace(4), i32, i32, i64)
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declare dso_local spir_func i64 @__spirv_AtomicUMin(ptr addrspace(4), i32, i32, i64)
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declare dso_local spir_func i64 @__spirv_AtomicUMax(ptr addrspace(4), i32, i32, i64)
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