e49180d84c
This adds support for Xqccmp to the following passes: - Prolog Epilog Insertion - reusing much of the existing push/pop logic, but extending it to cope with frame pointers and reorder the CFI information correctly. - Move Merger - extending it to support the `qc.` variants of the double-move instructions. - Push/Pop Optimizer - extending it to support the `qc.` variants of the pop instructions. The testing is based on existing Zcmp tests, but I have put them in separate files as some of the Zcmp tests were getting quite long.
97 lines
3.6 KiB
C++
97 lines
3.6 KiB
C++
//=- RISCVMachineFunctionInfo.cpp - RISC-V machine function info --*- C++ -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares RISCV-specific per-machine-function information.
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//
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//===----------------------------------------------------------------------===//
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#include "RISCVMachineFunctionInfo.h"
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#include "llvm/IR/Module.h"
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using namespace llvm;
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yaml::RISCVMachineFunctionInfo::RISCVMachineFunctionInfo(
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const llvm::RISCVMachineFunctionInfo &MFI)
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: VarArgsFrameIndex(MFI.getVarArgsFrameIndex()),
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VarArgsSaveSize(MFI.getVarArgsSaveSize()) {}
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MachineFunctionInfo *RISCVMachineFunctionInfo::clone(
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BumpPtrAllocator &Allocator, MachineFunction &DestMF,
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const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
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const {
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return DestMF.cloneInfo<RISCVMachineFunctionInfo>(*this);
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}
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RISCVMachineFunctionInfo::RISCVMachineFunctionInfo(const Function &F,
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const RISCVSubtarget *STI) {
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// The default stack probe size is 4096 if the function has no
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// stack-probe-size attribute. This is a safe default because it is the
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// smallest possible guard page size.
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uint64_t ProbeSize = 4096;
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if (F.hasFnAttribute("stack-probe-size"))
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ProbeSize = F.getFnAttributeAsParsedInteger("stack-probe-size");
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else if (const auto *PS = mdconst::extract_or_null<ConstantInt>(
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F.getParent()->getModuleFlag("stack-probe-size")))
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ProbeSize = PS->getZExtValue();
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assert(int64_t(ProbeSize) > 0 && "Invalid stack probe size");
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// Round down to the stack alignment.
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uint64_t StackAlign =
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STI->getFrameLowering()->getTransientStackAlign().value();
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ProbeSize = std::max(StackAlign, alignDown(ProbeSize, StackAlign));
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StringRef ProbeKind;
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if (F.hasFnAttribute("probe-stack"))
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ProbeKind = F.getFnAttribute("probe-stack").getValueAsString();
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else if (const auto *PS = dyn_cast_or_null<MDString>(
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F.getParent()->getModuleFlag("probe-stack")))
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ProbeKind = PS->getString();
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if (ProbeKind.size()) {
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StackProbeSize = ProbeSize;
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}
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}
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void yaml::RISCVMachineFunctionInfo::mappingImpl(yaml::IO &YamlIO) {
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MappingTraits<RISCVMachineFunctionInfo>::mapping(YamlIO, *this);
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}
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RISCVMachineFunctionInfo::PushPopKind
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RISCVMachineFunctionInfo::getPushPopKind(const MachineFunction &MF) const {
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// We cannot use fixed locations for the callee saved spill slots if the
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// function uses a varargs save area.
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// TODO: Use a separate placement for vararg registers to enable Zcmp.
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if (VarArgsSaveSize != 0)
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return PushPopKind::None;
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// Zcmp is not compatible with the frame pointer convention.
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if (MF.getSubtarget<RISCVSubtarget>().hasStdExtZcmp() &&
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!MF.getTarget().Options.DisableFramePointerElim(MF))
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return PushPopKind::StdExtZcmp;
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// Xqccmp is Zcmp but has a push order compatible with the frame-pointer
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// convention.
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if (MF.getSubtarget<RISCVSubtarget>().hasVendorXqccmp())
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return PushPopKind::VendorXqccmp;
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return PushPopKind::None;
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}
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void RISCVMachineFunctionInfo::initializeBaseYamlFields(
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const yaml::RISCVMachineFunctionInfo &YamlMFI) {
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VarArgsFrameIndex = YamlMFI.VarArgsFrameIndex;
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VarArgsSaveSize = YamlMFI.VarArgsSaveSize;
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}
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void RISCVMachineFunctionInfo::addSExt32Register(Register Reg) {
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SExt32Registers.push_back(Reg);
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}
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bool RISCVMachineFunctionInfo::isSExt32Register(Register Reg) const {
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return is_contained(SExt32Registers, Reg);
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}
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