5222cb601b
Summary: This CL changes the ExtractLane ISEL multiclass to more closely mirror the structure of the splat and replace_lane multiclasses. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D50794 llvm-svn: 339801
133 lines
5.7 KiB
TableGen
133 lines
5.7 KiB
TableGen
// WebAssemblyInstrSIMD.td - WebAssembly SIMD codegen support -*- tablegen -*-//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// WebAssembly SIMD operand code-gen constructs.
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///
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//===----------------------------------------------------------------------===//
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// immediate argument types
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def ImmByte : ImmLeaf<i32, [{ return 0 <= Imm && Imm < 256; }]>;
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foreach SIZE = [2, 4, 8, 16, 32] in
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def LaneIdx#SIZE : ImmLeaf<i32, "return 0 <= Imm && Imm < "#SIZE#";">;
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// lane extraction
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multiclass ExtractLane<ValueType vec_t, string vec, ImmLeaf imm_t,
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WebAssemblyRegClass reg_t, bits<32> simdop,
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string suffix = "", SDNode extract = vector_extract> {
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defm EXTRACT_LANE_#vec_t#suffix :
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SIMD_I<(outs reg_t:$dst), (ins V128:$vec, I32:$idx),
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(outs), (ins I32:$idx),
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[(set reg_t:$dst, (extract (vec_t V128:$vec), (i32 imm_t:$idx)))],
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vec#".extract_lane"#suffix#"\t$dst, $vec, $idx",
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vec#".extract_lane"#suffix#"\t$idx", simdop>;
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}
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multiclass ExtractPat<ValueType lane_t, int mask> {
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def _s : PatFrag<(ops node:$vec, node:$idx),
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(i32 (sext_inreg
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(i32 (vector_extract
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node:$vec,
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node:$idx
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)),
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lane_t
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))>;
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def _u : PatFrag<(ops node:$vec, node:$idx),
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(i32 (and
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(i32 (vector_extract
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node:$vec,
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node:$idx
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)),
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(i32 mask)
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))>;
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}
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defm extract_i8x16 : ExtractPat<i8, 0xff>;
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defm extract_i16x8 : ExtractPat<i16, 0xffff>;
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multiclass ExtractLaneExtended<string sign, bits<32> baseInst> {
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defm "" : ExtractLane<v16i8, "i8x16", LaneIdx16, I32, baseInst, sign,
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!cast<PatFrag>("extract_i8x16"#sign)>;
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defm "" : ExtractLane<v8i16, "i16x8", LaneIdx8, I32, !add(baseInst, 2), sign,
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!cast<PatFrag>("extract_i16x8"#sign)>;
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}
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let Defs = [ARGUMENTS] in {
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defm "" : ExtractLaneExtended<"_s", 9>;
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defm "" : ExtractLaneExtended<"_u", 10>;
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defm "" : ExtractLane<v4i32, "i32x4", LaneIdx4, I32, 13>;
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defm "" : ExtractLane<v2i64, "i64x2", LaneIdx2, I64, 14>;
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defm "" : ExtractLane<v4f32, "f32x4", LaneIdx4, F32, 15>;
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defm "" : ExtractLane<v2f64, "f64x2", LaneIdx2, F64, 16>;
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} // Defs = [ARGUMENTS]
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// follow convention of making implicit expansions unsigned
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def : Pat<(i32 (vector_extract (v16i8 V128:$vec), (i32 LaneIdx16:$idx))),
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(EXTRACT_LANE_v16i8_u V128:$vec, (i32 LaneIdx16:$idx))>;
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def : Pat<(i32 (vector_extract (v8i16 V128:$vec), (i32 LaneIdx8:$idx))),
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(EXTRACT_LANE_v8i16_u V128:$vec, (i32 LaneIdx8:$idx))>;
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// lane replacement
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multiclass ReplaceLane<ValueType vec_t, string vec, WebAssemblyRegClass reg_t,
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ValueType lane_t, ImmLeaf imm_t, bits<32> simdop> {
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defm REPLACE_LANE_#vec_t :
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SIMD_I<(outs V128:$dst), (ins V128:$vec, I32:$idx, reg_t:$x),
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(outs), (ins I32:$idx),
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[(set V128:$dst, (vector_insert
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(vec_t V128:$vec), (lane_t reg_t:$x), (i32 imm_t:$idx)))],
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vec#".replace_lane\t$dst, $vec, $idx, $x",
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vec#".replace_lane\t$idx", simdop>;
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}
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let Defs = [ARGUMENTS] in {
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defm "" : ReplaceLane<v16i8, "i8x16", I32, i32, LaneIdx16, 17>;
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defm "" : ReplaceLane<v8i16, "i16x8", I32, i32, LaneIdx8, 18>;
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defm "" : ReplaceLane<v4i32, "i32x4", I32, i32, LaneIdx4, 19>;
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defm "" : ReplaceLane<v2i64, "i64x2", I64, i64, LaneIdx2, 20>;
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defm "" : ReplaceLane<v4f32, "f32x4", F32, f32, LaneIdx4, 21>;
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defm "" : ReplaceLane<v2f64, "f64x2", F64, f64, LaneIdx2, 22>;
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} // Defs = [ARGUMENTS]
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// splats
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def splat2 : PatFrag<(ops node:$x), (build_vector node:$x, node:$x)>;
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def splat4 : PatFrag<(ops node:$x), (build_vector
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node:$x, node:$x, node:$x, node:$x)>;
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def splat8 : PatFrag<(ops node:$x), (build_vector
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node:$x, node:$x, node:$x, node:$x,
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node:$x, node:$x, node:$x, node:$x)>;
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def splat16 : PatFrag<(ops node:$x), (build_vector
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node:$x, node:$x, node:$x, node:$x,
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node:$x, node:$x, node:$x, node:$x,
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node:$x, node:$x, node:$x, node:$x,
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node:$x, node:$x, node:$x, node:$x)>;
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multiclass Splat<ValueType vec_t, string vec, WebAssemblyRegClass reg_t,
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PatFrag splat_pat, bits<32> simdop> {
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defm SPLAT_#vec_t : SIMD_I<(outs V128:$dst), (ins reg_t:$x), (outs), (ins),
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[(set (vec_t V128:$dst), (splat_pat reg_t:$x))],
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vec#".splat\t$dst, $x", vec#".splat", simdop>;
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}
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let Defs = [ARGUMENTS] in {
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defm "" : Splat<v16i8, "i8x16", I32, splat16, 3>;
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defm "" : Splat<v8i16, "i16x8", I32, splat8, 4>;
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defm "" : Splat<v4i32, "i32x4", I32, splat4, 5>;
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defm "" : Splat<v2i64, "i64x2", I64, splat2, 6>;
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defm "" : Splat<v4f32, "f32x4", F32, splat4, 7>;
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defm "" : Splat<v2f64, "f64x2", F64, splat2, 8>;
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} // Defs = [ARGUMENTS]
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// arithmetic
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let Defs = [ARGUMENTS] in {
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let isCommutable = 1 in
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defm ADD : SIMDBinaryInt<add, "add ", 24>;
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defm SUB : SIMDBinaryInt<sub, "sub ", 28>;
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let isCommutable = 1 in
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defm MUL : SIMDBinaryInt<mul, "mul ", 32>;
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let isCommutable = 1 in
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defm ADD : SIMDBinaryFP<fadd, "add ", 122>;
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defm SUB : SIMDBinaryFP<fsub, "sub ", 124>;
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defm DIV : SIMDBinaryFP<fdiv, "div ", 126>;
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let isCommutable = 1 in
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defm MUL : SIMDBinaryFP<fmul, "mul ", 128>;
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} // Defs = [ARGUMENTS]
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