Alexander Potapenko 75a954330b [MSan] Shrink the register save area for non-SSE builds ...

If code is compiled for X86 without SSE support, the register save area
doesn't contain FPU registers, so `AMD64FpEndOffset` should be equal to
`AMD64GpEndOffset`.

llvm-svn: 339414

2018-08-10 08:06:43 +00:00

152 KiB

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