9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
30 lines
1.1 KiB
LLVM
30 lines
1.1 KiB
LLVM
; RUN: llc < %s -mtriple=r600 -mcpu=redwood | FileCheck %s
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; PRED_SET* instructions must be tied to any instruction that uses their
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; result. This tests that there are no instructions between the PRED_SET*
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; and the PREDICATE_BREAK in this loop.
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; CHECK: {{^}}loop_ge:
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; CHECK: LOOP_START_DX10
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; CHECK: ALU_PUSH_BEFORE
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; CHECK-NEXT: JUMP
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; CHECK-NEXT: LOOP_BREAK
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define amdgpu_kernel void @loop_ge(ptr addrspace(1) nocapture %out, i32 %iterations) nounwind {
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entry:
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%cmp5 = icmp sgt i32 %iterations, 0
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br i1 %cmp5, label %for.body, label %for.end
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for.body: ; preds = %for.body, %entry
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%i.07.in = phi i32 [ %i.07, %for.body ], [ %iterations, %entry ]
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%ai.06 = phi i32 [ %add, %for.body ], [ 0, %entry ]
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%i.07 = add nsw i32 %i.07.in, -1
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%arrayidx = getelementptr inbounds i32, ptr addrspace(1) %out, i32 %ai.06
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store i32 %i.07, ptr addrspace(1) %arrayidx, align 4
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%add = add nsw i32 %ai.06, 1
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%exitcond = icmp eq i32 %add, %iterations
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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}
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