9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
111 lines
3.8 KiB
LLVM
111 lines
3.8 KiB
LLVM
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=bonaire < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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declare double @llvm.trunc.f64(double) nounwind readnone
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declare <2 x double> @llvm.trunc.v2f64(<2 x double>) nounwind readnone
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declare <3 x double> @llvm.trunc.v3f64(<3 x double>) nounwind readnone
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declare <4 x double> @llvm.trunc.v4f64(<4 x double>) nounwind readnone
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declare <8 x double> @llvm.trunc.v8f64(<8 x double>) nounwind readnone
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declare <16 x double> @llvm.trunc.v16f64(<16 x double>) nounwind readnone
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; FUNC-LABEL: {{^}}v_ftrunc_f64:
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; CI: v_trunc_f64
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; SI: s_bfe_u32 {{s[0-9]+}}, {{s[0-9]+}}, 0xb0014
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; SI: s_endpgm
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define amdgpu_kernel void @v_ftrunc_f64(ptr addrspace(1) %out, ptr addrspace(1) %in) {
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%x = load double, ptr addrspace(1) %in, align 8
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%y = call double @llvm.trunc.f64(double %x) nounwind readnone
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store double %y, ptr addrspace(1) %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}ftrunc_f64:
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; CI: v_trunc_f64_e32
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; SI: s_bfe_u32 [[SEXP:s[0-9]+]], {{s[0-9]+}}, 0xb0014
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; SI-DAG: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80000000
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; SI-DAG: s_add_i32 [[SEXP1:s[0-9]+]], [[SEXP]], 0xfffffc01
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; SI-DAG: s_lshr_b64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], [[SEXP1]]
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; SI-DAG: s_andn2_b64
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; SI-DAG: cmp_gt_i32
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; SI-DAG: s_cselect_b32
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; SI-DAG: s_cselect_b32
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; SI-DAG: cmp_lt_i32
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; SI-DAG: s_cselect_b32
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; SI-DAG: s_cselect_b32
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; SI: s_endpgm
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define amdgpu_kernel void @ftrunc_f64(ptr addrspace(1) %out, double %x) {
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%y = call double @llvm.trunc.f64(double %x) nounwind readnone
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store double %y, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}ftrunc_v2f64:
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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define amdgpu_kernel void @ftrunc_v2f64(ptr addrspace(1) %out, <2 x double> %x) {
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%y = call <2 x double> @llvm.trunc.v2f64(<2 x double> %x) nounwind readnone
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store <2 x double> %y, ptr addrspace(1) %out
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ret void
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}
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; FIXME-FUNC-LABEL: {{^}}ftrunc_v3f64:
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; FIXME-CI: v_trunc_f64_e32
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; FIXME-CI: v_trunc_f64_e32
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; FIXME-CI: v_trunc_f64_e32
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; define amdgpu_kernel void @ftrunc_v3f64(ptr addrspace(1) %out, <3 x double> %x) {
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; %y = call <3 x double> @llvm.trunc.v3f64(<3 x double> %x) nounwind readnone
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; store <3 x double> %y, ptr addrspace(1) %out
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; ret void
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; }
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; FUNC-LABEL: {{^}}ftrunc_v4f64:
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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define amdgpu_kernel void @ftrunc_v4f64(ptr addrspace(1) %out, <4 x double> %x) {
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%y = call <4 x double> @llvm.trunc.v4f64(<4 x double> %x) nounwind readnone
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store <4 x double> %y, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}ftrunc_v8f64:
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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define amdgpu_kernel void @ftrunc_v8f64(ptr addrspace(1) %out, <8 x double> %x) {
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%y = call <8 x double> @llvm.trunc.v8f64(<8 x double> %x) nounwind readnone
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store <8 x double> %y, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}ftrunc_v16f64:
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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; CI: v_trunc_f64_e32
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define amdgpu_kernel void @ftrunc_v16f64(ptr addrspace(1) %out, <16 x double> %x) {
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%y = call <16 x double> @llvm.trunc.v16f64(<16 x double> %x) nounwind readnone
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store <16 x double> %y, ptr addrspace(1) %out
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ret void
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}
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