9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
33 lines
1.1 KiB
YAML
33 lines
1.1 KiB
YAML
# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass post-RA-sched %s -o - | FileCheck -check-prefix=GFX90 %s
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# This tests that a KILL isn't considered as a valid instruction for a hazard
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# slot (e.g. m0 def followed by V_INTERP for gfx9)
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# The hazard recognizer should mov another instruction into that slot (in this case the S_MOV_B32
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--- |
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define amdgpu_ps void @_amdgpu_ps_main() #0 { ret void }
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...
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---
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# GFX90-LABEL: name: _amdgpu_ps_main
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# GFX90-LABEL: bb.0:
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# GFX90: $m0 = S_MOV_B32 killed renamable $sgpr4
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# GFX90-NEXT: KILL undef renamable $sgpr2
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# GFX90-NEXT: S_MOV_B32 0
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# GFX90-NEXT: V_INTERP_MOV_F32
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name: _amdgpu_ps_main
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr2, $sgpr3, $sgpr4
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$sgpr6 = S_MOV_B32 killed $sgpr3
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renamable $sgpr8_sgpr9_sgpr10_sgpr11 = S_LOAD_DWORDX4_IMM renamable $sgpr6_sgpr7, 16, 0
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$m0 = S_MOV_B32 killed renamable $sgpr4
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dead renamable $sgpr0 = KILL undef renamable $sgpr2
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renamable $vgpr0 = V_INTERP_MOV_F32 2, 0, 0, implicit $mode, implicit $m0, implicit $exec
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renamable $sgpr0 = S_MOV_B32 0
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S_ENDPGM 0
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...
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