e0a763c490
As well as flipping the sense of the bit, GFX12 moved it from bit 0 to bit 1 in the encoded simm16 operand.
15 lines
701 B
LLVM
15 lines
701 B
LLVM
; RUN: llc -global-isel=0 -mtriple=amdgcn -verify-machineinstrs -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GCN,GFX11 %s
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; RUN: llc -global-isel=1 -mtriple=amdgcn -verify-machineinstrs -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GCN,GFX11 %s
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; RUN: llc -global-isel=0 -mtriple=amdgcn -verify-machineinstrs -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GCN,GFX12 %s
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; RUN: llc -global-isel=1 -mtriple=amdgcn -verify-machineinstrs -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GCN,GFX12 %s
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; GCN-LABEL: {{^}}test_wait_event:
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; GFX11: s_wait_event 0x0
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; GFX12: s_wait_event 0x2
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define amdgpu_ps void @test_wait_event() {
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entry:
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call void @llvm.amdgcn.s.wait.event.export.ready()
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ret void
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}
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