9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
27 lines
1.0 KiB
LLVM
27 lines
1.0 KiB
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=gfx600 -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s
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; On gfx6 and gfx7, this test shows a bug in SelectionDAG where scalarizing the
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; extension of a vector of f16 generates an illegal node that errors later.
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; CHECK-LABEL: {{^}}main:
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; CHECK: v_cvt_f32_f16
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define amdgpu_gs void @main(i32 inreg %arg) local_unnamed_addr #0 {
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.entry:
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%tmp = load volatile float, ptr addrspace(1) undef
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%tmp1 = bitcast float %tmp to i32
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%im0.i = lshr i32 %tmp1, 16
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%tmp2 = insertelement <2 x i32> undef, i32 %im0.i, i32 1
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%tmp3 = trunc <2 x i32> %tmp2 to <2 x i16>
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%tmp4 = bitcast <2 x i16> %tmp3 to <2 x half>
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%tmp5 = fpext <2 x half> %tmp4 to <2 x float>
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%bc = bitcast <2 x float> %tmp5 to <2 x i32>
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%tmp6 = extractelement <2 x i32> %bc, i32 1
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store volatile i32 %tmp6, ptr addrspace(1) undef
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ret void
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}
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attributes #0 = { nounwind }
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