Stanislav Mekhanoshin 909a5ccf3b [AMDGPU] Improve global SADDR selection ...

An address can be a uniform sum of two i64 bit values.
That regularly happens in a loop where index is an induction
variable promoted to 64 bit by the LSR. We can materialize
zero in a VGPR and still use SADDR form of the load.

Differential Revision: https://reviews.llvm.org/D101591

2021-05-05 14:44:21 -07:00

53 KiB

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