395607af3c
This was reverted to mitigate mitigate miscompiles caused by the logical and/or to bitwise and/or fold. Reapply it now that the underlying issue has been fixed by D101191. ----- This patch folds more operations to poison. Alive2 proof: https://alive2.llvm.org/ce/z/mxcb9G (it does not contain tests about div/rem because they fold to poison when raising UB) Reviewed By: nikic Differential Revision: https://reviews.llvm.org/D92270
53 lines
1.6 KiB
LLVM
53 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instsimplify -S | FileCheck %s
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define i32 @test1() {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: ret i32 2139171423
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;
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%A = bitcast i32 2139171423 to float
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%B = insertelement <1 x float> undef, float %A, i32 0
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%C = extractelement <1 x float> %B, i32 0
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%D = bitcast float %C to i32
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ret i32 %D
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}
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define <4 x i64> @insertelement() {
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; CHECK-LABEL: @insertelement(
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; CHECK-NEXT: ret <4 x i64> <i64 -1, i64 -2, i64 -3, i64 -4>
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;
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%vec1 = insertelement <4 x i64> undef, i64 -1, i32 0
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%vec2 = insertelement <4 x i64> %vec1, i64 -2, i32 1
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%vec3 = insertelement <4 x i64> %vec2, i64 -3, i32 2
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%vec4 = insertelement <4 x i64> %vec3, i64 -4, i32 3
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ret <4 x i64> %vec4
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}
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define <4 x i64> @insertelement_undef() {
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; CHECK-LABEL: @insertelement_undef(
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; CHECK-NEXT: ret <4 x i64> poison
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;
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%vec1 = insertelement <4 x i64> undef, i64 -1, i32 0
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%vec2 = insertelement <4 x i64> %vec1, i64 -2, i32 1
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%vec3 = insertelement <4 x i64> %vec2, i64 -3, i32 2
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%vec4 = insertelement <4 x i64> %vec3, i64 -4, i32 3
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%vec5 = insertelement <4 x i64> %vec3, i64 -5, i32 4
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ret <4 x i64> %vec5
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}
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define i64 @extract_undef_index_from_zero_vec() {
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; CHECK-LABEL: @extract_undef_index_from_zero_vec(
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; CHECK-NEXT: ret i64 poison
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;
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%E = extractelement <2 x i64> zeroinitializer, i64 undef
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ret i64 %E
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}
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define i64 @extract_undef_index_from_nonzero_vec() {
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; CHECK-LABEL: @extract_undef_index_from_nonzero_vec(
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; CHECK-NEXT: ret i64 poison
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;
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%E = extractelement <2 x i64> <i64 -1, i64 -1>, i64 undef
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ret i64 %E
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}
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