6699029b67
We tend to assume that the AA pipeline is by default the default AA pipeline and it's confusing when it's empty instead. PR48779 Initially reverted due to BasicAA running analyses in an unspecified order (multiple function calls as parameters), fixed by fetching analyses before the call to construct BasicAA. Reviewed By: asbirlea Differential Revision: https://reviews.llvm.org/D95117
57 lines
2.9 KiB
LLVM
57 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -O2 -S | FileCheck %s
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; RUN: opt < %s -passes='default<O2>' -S | FileCheck %s
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target triple = "x86_64--"
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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declare void @llvm.x86.avx.maskstore.ps.256(i8*, <8 x i32>, <8 x float>) #0
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declare void @llvm.masked.store.v8f32.p0v8f32(<8 x float>, <8 x float>*, i32, <8 x i1>)
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; PR11210: If we have been able to replace a AVX/AVX2 masked store with a
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; generic masked store intrinsic, then we should be able to remove dead
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; masked stores.
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define void @PR11210_v8f32_maskstore_maskstore(i8* %ptr, <8 x float> %x, <8 x float> %y, <8 x i32> %src) {
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; CHECK-LABEL: @PR11210_v8f32_maskstore_maskstore(
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <8 x i32> [[SRC:%.*]], zeroinitializer
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; CHECK-NEXT: [[CASTVEC:%.*]] = bitcast i8* [[PTR:%.*]] to <8 x float>*
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; CHECK-NEXT: tail call void @llvm.masked.store.v8f32.p0v8f32(<8 x float> [[Y:%.*]], <8 x float>* [[CASTVEC]], i32 1, <8 x i1> [[CMP]])
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; CHECK-NEXT: ret void
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;
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%cmp = icmp sgt <8 x i32> %src, zeroinitializer
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%mask = sext <8 x i1> %cmp to <8 x i32>
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call void @llvm.x86.avx.maskstore.ps.256(i8* %ptr, <8 x i32> %mask, <8 x float> %x)
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call void @llvm.x86.avx.maskstore.ps.256(i8* %ptr, <8 x i32> %mask, <8 x float> %y)
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ret void
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}
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; The contents of %mask are unknown so we don't replace this with a generic masked.store.
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define void @PR11210_v8f32_maskstore_maskstore_raw_mask(i8* %ptr, <8 x float> %x, <8 x float> %y, <8 x i32> %mask) {
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; CHECK-LABEL: @PR11210_v8f32_maskstore_maskstore_raw_mask(
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; CHECK-NEXT: tail call void @llvm.x86.avx.maskstore.ps.256(i8* [[PTR:%.*]], <8 x i32> [[MASK:%.*]], <8 x float> [[X:%.*]])
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; CHECK-NEXT: tail call void @llvm.x86.avx.maskstore.ps.256(i8* [[PTR]], <8 x i32> [[MASK]], <8 x float> [[Y:%.*]])
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; CHECK-NEXT: ret void
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;
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call void @llvm.x86.avx.maskstore.ps.256(i8* %ptr, <8 x i32> %mask, <8 x float> %x)
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call void @llvm.x86.avx.maskstore.ps.256(i8* %ptr, <8 x i32> %mask, <8 x float> %y)
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ret void
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}
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; Mix AVX and generic masked stores.
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define void @PR11210_v8f32_mstore_maskstore(i8* %ptr, <8 x float> %x, <8 x float> %y, <8 x i32> %src) {
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; CHECK-LABEL: @PR11210_v8f32_mstore_maskstore(
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <8 x i32> [[SRC:%.*]], zeroinitializer
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; CHECK-NEXT: [[PTRF:%.*]] = bitcast i8* [[PTR:%.*]] to <8 x float>*
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; CHECK-NEXT: tail call void @llvm.masked.store.v8f32.p0v8f32(<8 x float> [[Y:%.*]], <8 x float>* [[PTRF]], i32 1, <8 x i1> [[CMP]])
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; CHECK-NEXT: ret void
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;
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%cmp = icmp sgt <8 x i32> %src, zeroinitializer
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%mask = sext <8 x i1> %cmp to <8 x i32>
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%ptrf = bitcast i8* %ptr to <8 x float>*
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tail call void @llvm.masked.store.v8f32.p0v8f32(<8 x float> %x, <8 x float>* %ptrf, i32 1, <8 x i1> %cmp)
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call void @llvm.x86.avx.maskstore.ps.256(i8* %ptr, <8 x i32> %mask, <8 x float> %y)
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ret void
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}
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