Files
clang-p2996/llvm/test/CodeGen/AMDGPU
Matt Arsenault 79f67cae91 AMDGPU: Rename add/sub with carry out instructions
The hardware has created a real mess in the naming for add/sub, which
have been renamed basically every generation. Switch the carry out
pseudos to have the gfx9/gfx10 names. We were using the original SI/CI
v_add_i32/v_sub_i32 names. Later targets reintroduced these names as
carryless instructions with a saturating clamp bit, which we do not
define. Do this rename so we can unambiguously add these missing
instructions.

The carry-in versions should also be renamed, but at least those had a
consistent _u32 name to begin with. The 16-bit instructions were also
renamed, but aren't ambiguous.

This does regress assembler error message quality in some cases. In
mismatched wave32/wave64 situations, this will switch from
"unsupported instruction" to "invalid operand", with the error
pointing at the wrong position. I couldn't quite follow how the
assembler selects these, but the previous behavior seemed accidental
to me. It looked like there was a partial attempt to handle this which
was never completed (i.e. there is an AMDGPUOperand::isBoolReg but it
isn't used for anything).
2020-07-16 13:16:30 -04:00
..
2020-06-25 10:38:23 +02:00
2020-02-14 09:53:22 -08:00
2020-05-29 15:19:59 -04:00
2020-06-25 10:38:23 +02:00
2020-06-25 10:38:23 +02:00
2020-06-25 10:38:23 +02:00
2020-06-25 10:38:23 +02:00
2020-06-15 16:18:05 -07:00
2020-06-25 10:38:23 +02:00
2020-06-25 10:38:23 +02:00
2020-06-15 16:18:05 -07:00
2020-06-15 16:18:05 -07:00
2020-06-25 10:38:23 +02:00
2020-06-15 16:18:05 -07:00
2020-06-15 16:18:05 -07:00
2020-06-25 10:38:23 +02:00
2020-06-25 10:38:23 +02:00
2020-06-25 10:38:23 +02:00
2020-06-25 10:38:23 +02:00
2020-06-25 10:38:23 +02:00
2020-06-25 10:38:23 +02:00
2020-06-25 10:38:23 +02:00
2020-06-25 10:38:23 +02:00
2020-05-17 16:13:55 +05:30
2020-06-04 17:49:00 -04:00
2020-06-04 17:49:00 -04:00
2020-06-04 17:49:00 -04:00
2020-06-04 17:49:00 -04:00
2020-06-04 17:49:00 -04:00
2020-06-04 17:49:00 -04:00
2020-06-04 17:49:00 -04:00
2020-06-04 17:49:00 -04:00
2020-06-04 17:49:00 -04:00
2020-04-03 10:07:21 +01:00
2020-06-25 10:38:23 +02:00
2020-06-25 10:38:23 +02:00
2020-06-15 16:18:05 -07:00
2020-06-25 10:38:23 +02:00
2020-06-25 10:38:23 +02:00
2020-06-15 16:18:05 -07:00
2020-06-25 10:38:23 +02:00

+==============================================================================+
| How to organize the lit tests                                                |
+==============================================================================+

- If you write a test for matching a single DAG opcode or intrinsic, it should
  go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)

- If you write a test that matches several DAG opcodes and checks for a single
  ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
  bfi_int.ll

- For all other tests, use your best judgement for organizing tests and naming
  the files.

+==============================================================================+
| Naming conventions                                                           |
+==============================================================================+

- Use dash '-' and not underscore '_' to separate words in file names, unless
  the file is named after a DAG opcode or ISA instruction that has an
  underscore '_' in its name.