Iris Shi f2eb5d416e [SelectionDAG] Handle fneg/fabs/fcopysign in SimplifyDemandedBits (#139239)

2025-06-22 22:48:59 +08:00

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AArch64

[SelectionDAG] Handle fneg/fabs/fcopysign in SimplifyDemandedBits (#139239)

2025-06-22 22:48:59 +08:00

AMDGPU

[SelectionDAG] Handle fneg/fabs/fcopysign in SimplifyDemandedBits (#139239)

2025-06-22 22:48:59 +08:00

ARC

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ARM

[ARM] Add test coverage for #144845 and regenerate tests. NFC

2025-06-22 15:24:39 +01:00

AVR

[AVR] Don't apply post-indexing on mismatched pointers (#145224)

2025-06-22 18:18:00 +08:00

BPF

[BPF] Handle nested wrapper structs in BPF map definition traversal (#144097)

2025-06-20 10:17:36 -07:00

CSKY

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DirectX

[HLSL] Emit a version in the dx.rootsignatures metadata (#145113)

2025-06-20 16:21:47 -07:00

Generic

[CodeGen][COFF] Always emit CodeView compiler info on Windows targets (#142970)

2025-06-13 22:48:29 +02:00

Hexagon

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Inputs

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Lanai

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LoongArch

[DAG] Fold (and X, (add (not Y), Z)) -> (and X, (not (sub Y, Z))). (#141476)

2025-06-16 15:55:26 +01:00

M68k

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Mips

MC: Adjust -show-inst output for MCExpr

2025-06-15 21:46:09 -07:00

MIR

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MLRegAlloc

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MSP430

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NVPTX

[NVPTX] Add family-specific architectures support (#141899)

2025-06-19 12:18:17 +05:30

PowerPC

[NFC][PowerPC] pre-commit running the update_llc_test_checks.py for all-atomics.ll,loop-comment.ll etc (#144411)

2025-06-18 14:15:30 -04:00

RISCV

[SelectionDAG][RISCV] Treat zext nneg as sext in PromoteIntOp_ZERO_EXTEND if the promoted input is sign extended. (#145120)

2025-06-21 18:56:00 -07:00

SPARC

[SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (#143232)

2025-06-20 05:12:51 +07:00

SPIRV

[HLSL][SPIR-V] Fix LinkageAttribute emission for BuiltIn (#144701)

2025-06-18 17:26:40 +02:00

SystemZ

[SystemZ] Treat FAKE_USE instructions as instructions without a size (#144390)

2025-06-18 10:29:23 +01:00

Thumb

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Thumb2

[Thumb2] Regenerate some test checks. NFC

2025-06-18 11:54:51 +02:00

VE

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WebAssembly

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WinCFGuard

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WinEH

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X86

[X86] combineINSERT_SUBVECTOR - directly fold to X86ISD::SUBV_BROADCAST_LOAD to prevent vector split infinite loop (#145077)

2025-06-21 00:38:30 +02:00

XCore

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Xtensa

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