Files
clang-p2996/llvm/test/CodeGen/AArch64
David Green 8ab61404e8 [AArch64] Lower aarch64_neon_saddlv via SADDLV nodes. (#103307)
This mirrors what GISel already does, extending the existing lowering of
aarch64_neon_saddlv/aarch64_neon_uaddlv to SADDLV/UADDLV. This allows us
to remove some tablegen patterns, and provides a little nicer codegen in
places as the nodes represent the result being in a vector register
correctly.
2024-08-22 16:43:24 +01:00
..

++ SVE CodeGen Warnings ++

When the WARN check lines fail in the SVE codegen tests it most likely means you
have introduced a warning due to:
1. Adding an invalid call to VectorType::getNumElements() or EVT::getVectorNumElements()
   when the type is a scalable vector.
2. Relying upon an implicit cast conversion from TypeSize to uint64_t.

For generic code, please modify your code to work with ElementCount and TypeSize directly.
For target-specific code that only deals with fixed-width vectors, use the fixed-size interfaces.
Please refer to the code where those functions live for more details.