Files
clang-p2996/llvm/test/CodeGen/M68k
Ian Douglas Scott 34b37c00ab [M68k] Add instruction selection support for zext with PCD addressing
Instruction selection was failing when trying to zero extend a value
loaded from a PC-relative address. This adds support for zero extension
using the "program counter indirect with displacement" addressing mode.
It also adds a test with code that was previously failing to compile.

This fixes a compile error in Rust's libcore.

Differential Revision: https://reviews.llvm.org/D149034
2023-04-29 16:27:16 -07:00
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