782bc4f669
If a resources is used multiple times, we should only have one resource record for it. This comes up most prominantly with arrays of resources like so: ```hlsl RWBuffer<float4> BufferArray[10] : register(u0, space4); RWBuffer<float4> B1 = BufferArray[0]; RWBuffer<float4> B2 = BufferArray[SomeIndex]; RWBuffer<float4> B3 = BufferArray[3]; ``` In this case, there's only one resource, but we'll generate 3 different `dx.handle.fromBinding` calls to access different slices. Note that this adds some API that won't be used until #104447 later in the stack. Trying to avoid that results in unnecessary churn. Fixes #105143 Pull Request: https://github.com/llvm/llvm-project/pull/105602
135 lines
4.4 KiB
LLVM
135 lines
4.4 KiB
LLVM
; RUN: opt -S -disable-output -passes="print<dxil-resource>" < %s 2>&1 | FileCheck %s
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@G = external constant <4 x float>, align 4
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define void @test_typedbuffer() {
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; ByteAddressBuffer Buf : register(t8, space1)
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%srv0 = call target("dx.RawBuffer", i8, 0, 0)
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@llvm.dx.handle.fromBinding.tdx.RawBuffer_i8_0_0t(
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i32 1, i32 8, i32 1, i32 0, i1 false)
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; CHECK: Binding [[SRV0:[0-9]+]]:
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; CHECK: Symbol: ptr undef
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; CHECK: Name: ""
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; CHECK: Binding:
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; CHECK: Record ID: 0
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; CHECK: Space: 1
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; CHECK: Lower Bound: 8
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; CHECK: Size: 1
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; CHECK: Class: SRV
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; CHECK: Kind: RawBuffer
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; struct S { float4 a; uint4 b; };
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; StructuredBuffer<S> Buf : register(t2, space4)
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%srv1 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0)
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@llvm.dx.handle.fromBinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0t(
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i32 4, i32 2, i32 1, i32 0, i1 false)
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; CHECK: Binding [[SRV1:[0-9]+]]:
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; CHECK: Symbol: ptr undef
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; CHECK: Name: ""
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; CHECK: Binding:
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; CHECK: Record ID: 1
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; CHECK: Space: 4
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; CHECK: Lower Bound: 2
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; CHECK: Size: 1
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; CHECK: Class: SRV
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; CHECK: Kind: StructuredBuffer
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; CHECK: Buffer Stride: 32
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; CHECK: Alignment: 4
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; Buffer<uint4> Buf[24] : register(t3, space5)
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%srv2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0)
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@llvm.dx.handle.fromBinding.tdx.TypedBuffer_i32_0_0t(
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i32 5, i32 3, i32 24, i32 0, i1 false)
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; CHECK: Binding [[SRV2:[0-9]+]]:
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; CHECK: Symbol: ptr undef
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; CHECK: Name: ""
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; CHECK: Binding:
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; CHECK: Record ID: 2
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; CHECK: Space: 5
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; CHECK: Lower Bound: 3
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; CHECK: Size: 24
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; CHECK: Class: SRV
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; CHECK: Kind: TypedBuffer
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; CHECK: Element Type: u32
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; CHECK: Element Count: 4
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; RWBuffer<int> Buf : register(u7, space2)
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%uav0 = call target("dx.TypedBuffer", i32, 1, 0, 1)
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@llvm.dx.handle.fromBinding.tdx.TypedBuffer_i32_1_0t(
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i32 2, i32 7, i32 1, i32 0, i1 false)
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; CHECK: Binding [[UAV0:[0-9]+]]:
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; CHECK: Symbol: ptr undef
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; CHECK: Name: ""
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; CHECK: Binding:
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; CHECK: Record ID: 0
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; CHECK: Space: 2
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; CHECK: Lower Bound: 7
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; CHECK: Size: 1
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; CHECK: Class: UAV
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; CHECK: Kind: TypedBuffer
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; CHECK: Globally Coherent: 0
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; CHECK: HasCounter: 0
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; CHECK: IsROV: 0
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; CHECK: Element Type: i32
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; CHECK: Element Count: 1
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; RWBuffer<float4> Buf : register(u5, space3)
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%uav1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
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@llvm.dx.handle.fromBinding.tdx.TypedBuffer_f32_1_0(
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i32 3, i32 5, i32 1, i32 0, i1 false)
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; CHECK: Binding [[UAV1:[0-9]+]]:
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; CHECK: Symbol: ptr undef
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; CHECK: Name: ""
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; CHECK: Binding:
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; CHECK: Record ID: 1
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; CHECK: Space: 3
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; CHECK: Lower Bound: 5
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; CHECK: Size: 1
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; CHECK: Class: UAV
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; CHECK: Kind: TypedBuffer
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; CHECK: Globally Coherent: 0
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; CHECK: HasCounter: 0
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; CHECK: IsROV: 0
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; CHECK: Element Type: f32
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; CHECK: Element Count: 4
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; RWBuffer<float4> BufferArray[10] : register(u0, space4)
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; RWBuffer<float4> Buf = BufferArray[0]
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%uav2_1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
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@llvm.dx.handle.fromBinding.tdx.TypedBuffer_f32_1_0(
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i32 4, i32 0, i32 10, i32 0, i1 false)
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; RWBuffer<float4> Buf = BufferArray[5]
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%uav2_2 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
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@llvm.dx.handle.fromBinding.tdx.TypedBuffer_f32_1_0(
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i32 4, i32 0, i32 10, i32 5, i1 false)
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; CHECK: Binding [[UAV2:[0-9]+]]:
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; CHECK: Symbol: ptr undef
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; CHECK: Name: ""
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; CHECK: Binding:
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; CHECK: Record ID: 2
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; CHECK: Space: 4
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; CHECK: Lower Bound: 0
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; CHECK: Size: 10
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; CHECK: Class: UAV
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; CHECK: Kind: TypedBuffer
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; CHECK: Globally Coherent: 0
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; CHECK: HasCounter: 0
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; CHECK: IsROV: 0
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; CHECK: Element Type: f32
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; CHECK: Element Count: 4
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; CHECK-NOT: Binding {{[0-9]+}}:
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ret void
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}
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; CHECK-DAG: Call bound to [[SRV0]]: %srv0 =
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; CHECK-DAG: Call bound to [[SRV1]]: %srv1 =
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; CHECK-DAG: Call bound to [[SRV2]]: %srv2 =
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; CHECK-DAG: Call bound to [[UAV0]]: %uav0 =
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; CHECK-DAG: Call bound to [[UAV1]]: %uav1 =
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; CHECK-DAG: Call bound to [[UAV2]]: %uav2_1 =
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; CHECK-DAG: Call bound to [[UAV2]]: %uav2_2 =
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attributes #0 = { nocallback nofree nosync nounwind willreturn memory(none) }
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