9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
53 lines
1.8 KiB
LLVM
53 lines
1.8 KiB
LLVM
; RUN: opt -passes=loop-idiom -S < %s -mtriple=r600 -mcpu=redwood | FileCheck --check-prefix=R600 --check-prefix=FUNC %s
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; RUN: opt -passes=loop-idiom -S < %s -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s
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; RUN: opt -passes=loop-idiom -S < %s -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s
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target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
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; Make sure loop-idiom doesn't create memcpy or memset. There are no library
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; implementations of these for R600.
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; FUNC: @no_memcpy
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; R600-NOT: {{^}}llvm.memcpy
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; SI-NOT: {{^}}llvm.memcpy
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define amdgpu_kernel void @no_memcpy(ptr addrspace(3) %in, i32 %size) {
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entry:
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%dest = alloca i8, i32 32, addrspace(5)
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br label %for.body
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for.body:
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%0 = phi i32 [0, %entry], [%4, %for.body]
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%1 = getelementptr i8, ptr addrspace(3) %in, i32 %0
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%2 = getelementptr i8, ptr addrspace(5) %dest, i32 %0
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%3 = load i8, ptr addrspace(3) %1
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store i8 %3, ptr addrspace(5) %2
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%4 = add i32 %0, 1
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%5 = icmp eq i32 %4, %size
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br i1 %5, label %for.end, label %for.body
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for.end:
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ret void
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}
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; FUNC: @no_memset
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; R600-NOT: {{^}}llvm.memset
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; R600-NOT: {{^}}memset_pattern16:
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; SI-NOT: {{^}}llvm.memset
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; SI-NOT: {{^}}memset_pattern16:
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define amdgpu_kernel void @no_memset(i32 %size) {
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entry:
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%dest = alloca i8, i32 32, addrspace(5)
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br label %for.body
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for.body:
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%0 = phi i32 [0, %entry], [%2, %for.body]
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%1 = getelementptr i8, ptr addrspace(5) %dest, i32 %0
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store i8 0, ptr addrspace(5) %1
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%2 = add i32 %0, 1
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%3 = icmp eq i32 %2, %size
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br i1 %3, label %for.end, label %for.body
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for.end:
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ret void
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}
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