29b8b72117
This patch moves the check if any vector instructions will be generated from getInstructionCost to be based on VPlan. This simplifies getInstructionCost, is more accurate as we check the final result and also allows us to exit early once we visit a recipe that generates vector instructions. The helper can then be re-used by the VPlan-based cost model to match the legacy selectVectorizationFactor behavior, this fixing a crash and paving the way to recommit https://github.com/llvm/llvm-project/pull/92555. PR: https://github.com/llvm/llvm-project/pull/96622
36 lines
1.3 KiB
LLVM
36 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S -passes=loop-vectorize -mtriple=s390x-linux-gnu -vectorizer-min-trip-count=8 < %s | FileCheck %s
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define i32 @main(i32 %arg, ptr nocapture readnone %arg1) #0 {
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; CHECK-LABEL: define i32 @main(
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; CHECK-SAME: i32 [[ARG:%.*]], ptr nocapture readnone [[ARG1:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: [[TMP0:%.*]] = alloca i8, align 1
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[STOREMERGE_I_I:%.*]] = phi i8 [ 0, %[[ENTRY]] ], [ [[TMP12_I_I:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: store i8 [[STOREMERGE_I_I]], ptr [[TMP0]], align 2
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; CHECK-NEXT: [[TMP8_I_I:%.*]] = icmp ult i8 [[STOREMERGE_I_I]], 8
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; CHECK-NEXT: [[TMP12_I_I]] = add nuw nsw i8 [[STOREMERGE_I_I]], 1
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; CHECK-NEXT: br i1 [[TMP8_I_I]], label %[[LOOP]], label %[[RET:.*]]
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; CHECK: [[RET]]:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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%0 = alloca i8, align 1
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br label %loop
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loop:
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%storemerge.i.i = phi i8 [ 0, %entry ], [ %tmp12.i.i, %loop ]
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store i8 %storemerge.i.i, ptr %0, align 2
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%tmp8.i.i = icmp ult i8 %storemerge.i.i, 8
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%tmp12.i.i = add nuw nsw i8 %storemerge.i.i, 1
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br i1 %tmp8.i.i, label %loop, label %ret
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ret:
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ret i32 0
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}
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attributes #0 = { "target-cpu"="z13" }
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